Date: Thu, 20 May 2010 17:45:17 -0400 From: "b. f." <bf1783@googlemail.com> To: Kostik Belousov <kostikbel@gmail.com> Cc: freebsd-hackers@freebsd.org Subject: Re: kernel usage of fxsave/fxrstor Message-ID: <AANLkTimmc5xDKnCU8Xs3ZL9OlCXO_IcSX7abvS310wpw@mail.gmail.com> In-Reply-To: <20100520210631.GI83316@deviant.kiev.zoral.com.ua> References: <AANLkTinKHNReEDXtK11IGxs2FshMlAP9b66ao6KVrnuP@mail.gmail.com> <20100520210631.GI83316@deviant.kiev.zoral.com.ua>
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On 5/20/10, Kostik Belousov <kostikbel@gmail.com> wrote: > On Thu, May 20, 2010 at 01:41:22PM -0400, b. f. wrote: >> I'm wondering why we equate cpu_fxsr and hw_instruction_sse in our >> kernel, when several families of Intel and AMD processors have >> fxsave/fxrstor, but not sse, and various documents from both companies >> suggest that fxsave/fxrstor is faster than fsave/fnsave/frstor, even >> when only saving the fpu/mmx state, and ought to be used for context >> switches and calls and returns from interrupt and exception handlers >> (e.g.. Sections 8.1.11, 10.5, and 11.6.5 of the Intel 64 and IA-32 >> Software Developers' Manual, Volume 1: >> >> http://www.intel.com/Assets/PDF/manual/253665.pdf >> >> ). > What are the several families ? I am aware only of Pentium II > that did have FXSAVE implemented, but not SSE. I am not even sure > that all Pentium IIs have it, or only the later models. I think only later models of Pentium II, from Deschutes onward. As for the number of families, I guess it depends upon how you classify them. I was thinking of the several Athlon variants in addition to the Pentium II models. > > It is funny that I disposed my 2CPU Pentium II machine several weeks > ago. I do not consider it worth an effort trying to optimize for > some Pentiums II in 2010. I have two Pentium II laptops that see occasional use, and an Athlon desktop, that fall into this category. I'm sure that I'm not alone. If a few simple changes, using code similar to that we already are using for later models would yield some performance gains for them, I"d be interested in testing patches. Regards, b. >> >> >> As far as I can tell from a cursory check, Linux draws a distinction >> between cpu_has_fxsr, and cpu_has_xmm/xmm2, and uses fxsave/fxrstor on >> all processors that have the feature, regardless of whether they have >> sse. Shouldn't we do the same? Was this overlooked in the initial >> sse commits? Or are the Intel assertions that the newer instructions >> are faster incorrect? Or was the extra handling needed for the >> different semantics of the newer instructions, and/or concerns over >> FreeBSD-SA-06:14.fpu.asc/CVE-2006-1056 responsible for their >> suppression in pre-sse processors, even though safe methods of using >> them was suggested: >> >> http://security.freebsd.org/advisories/FreeBSD-SA-06:14-amd.txt ? >> >> (Note that I'm not asking about setting the CR4.OSFXSR bit when sse >> isn't needed or present, just using the newer fxsave/fxrstor when they >> are present.) >> >> Regards, >> b. >> _______________________________________________ >> freebsd-hackers@freebsd.org mailing list >> http://lists.freebsd.org/mailman/listinfo/freebsd-hackers >> To unsubscribe, send any mail to "freebsd-hackers-unsubscribe@freebsd.org" >
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