Date: Thu, 28 Jul 2011 12:08:13 +0000 (UTC) From: "Jayachandran C." <jchandra@FreeBSD.org> To: src-committers@freebsd.org, svn-src-user@freebsd.org Subject: svn commit: r224476 - user/jchandra/mips-xlp-support/sys/mips/nlm Message-ID: <201107281208.p6SC8DRm002920@svn.freebsd.org>
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Author: jchandra Date: Thu Jul 28 12:08:13 2011 New Revision: 224476 URL: http://svn.freebsd.org/changeset/base/224476 Log: Create custom bus space for the SoC UART. The SoC uart needs to use 32bit access to its registers, use a custom bus space for this. Remove the hack in default bus space for this. Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/bus_space_rmi.c user/jchandra/mips-xlp-support/sys/mips/nlm/uart_cpu_xlp.c user/jchandra/mips-xlp-support/sys/mips/nlm/uart_pci_xlp.c user/jchandra/mips-xlp-support/sys/mips/nlm/xlp_pci.c Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/bus_space_rmi.c ============================================================================== --- user/jchandra/mips-xlp-support/sys/mips/nlm/bus_space_rmi.c Thu Jul 28 11:41:55 2011 (r224475) +++ user/jchandra/mips-xlp-support/sys/mips/nlm/bus_space_rmi.c Thu Jul 28 12:08:13 2011 (r224476) @@ -401,14 +401,14 @@ static u_int8_t rmi_bus_space_read_1(void *tag, bus_space_handle_t handle, bus_size_t offset) { - return (u_int8_t) (*(volatile u_int32_t *)(handle + offset)); + return (u_int8_t) (*(volatile u_int8_t *)(handle + offset)); } static u_int16_t rmi_bus_space_read_2(void *tag, bus_space_handle_t handle, bus_size_t offset) { - return (u_int16_t)(*(volatile u_int32_t *)(handle + offset)); + return (u_int16_t)(*(volatile u_int16_t *)(handle + offset)); } static u_int32_t @@ -453,14 +453,14 @@ static void rmi_bus_space_write_1(void *tag, bus_space_handle_t handle, bus_size_t offset, u_int8_t value) { - *(volatile u_int32_t *)(handle + offset) = (u_int32_t)value; + *(volatile u_int8_t *)(handle + offset) = value; } static void rmi_bus_space_write_2(void *tag, bus_space_handle_t handle, bus_size_t offset, u_int16_t value) { - *(volatile u_int32_t *)(handle + offset) = (u_int32_t)value; + *(volatile u_int16_t *)(handle + offset) = value; } static void Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/uart_cpu_xlp.c ============================================================================== --- user/jchandra/mips-xlp-support/sys/mips/nlm/uart_cpu_xlp.c Thu Jul 28 11:41:55 2011 (r224475) +++ user/jchandra/mips-xlp-support/sys/mips/nlm/uart_cpu_xlp.c Thu Jul 28 12:08:13 2011 (r224476) @@ -60,19 +60,43 @@ __FBSDID("$FreeBSD: head/sys/mips/rmi/ua bus_space_tag_t uart_bus_space_io; bus_space_tag_t uart_bus_space_mem; +/* + * need a special bus space for this, because the Netlogic SoC + * UART allows only 32 bit access to its registers + */ +static struct bus_space nlm_uart_bussp; + +static u_int8_t +nlm_uart_bussp_read_1(void *tag, bus_space_handle_t handle, + bus_size_t offset) +{ + return (u_int8_t)(*(volatile u_int32_t *)(handle + offset)); +} + +static void +nlm_uart_bussp_write_1(void *tag, bus_space_handle_t handle, + bus_size_t offset, u_int8_t value) +{ + *(volatile u_int32_t *)(handle + offset) = value; +} + int uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2) { return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0); } - int uart_cpu_getdev(int devtype, struct uart_devinfo *di) { + /* Create custom bus space */ + memcpy(&nlm_uart_bussp, rmi_bus_space, sizeof(nlm_uart_bussp)); + nlm_uart_bussp.bs_r_1 = nlm_uart_bussp_read_1; + nlm_uart_bussp.bs_w_1 = nlm_uart_bussp_write_1; + di->ops = uart_getops(&uart_ns8250_class); di->bas.chan = 0; - di->bas.bst = rmi_bus_space; + di->bas.bst = &nlm_uart_bussp; di->bas.bsh = nlm_regbase_uart(0, 0) + XLP_IO_PCI_HDRSZ; di->bas.regshft = 2; @@ -84,6 +108,6 @@ uart_cpu_getdev(int devtype, struct uart di->parity = UART_PARITY_NONE; uart_bus_space_io = NULL; - uart_bus_space_mem = rmi_bus_space; + uart_bus_space_mem = &nlm_uart_bussp; return (0); } Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/uart_pci_xlp.c ============================================================================== --- user/jchandra/mips-xlp-support/sys/mips/nlm/uart_pci_xlp.c Thu Jul 28 11:41:55 2011 (r224475) +++ user/jchandra/mips-xlp-support/sys/mips/nlm/uart_pci_xlp.c Thu Jul 28 12:08:13 2011 (r224476) @@ -76,11 +76,10 @@ uart_soc_probe(device_t dev) return (ENXIO); ubase = nlm_regbase_uart(0, 0); - nlm_pci_wreg(ubase, 0xf, 0x1ff); sc = device_get_softc(dev); sc->sc_class = &uart_ns8250_class; device_set_desc(dev, "Netlogic SoC UART"); return (uart_bus_probe(dev, 2, 133000000, 0, 0)); } -DRIVER_MODULE(soc_uart, pci, uart_soc_driver, uart_devclass, 0, 0); +DRIVER_MODULE(uart_soc, pci, uart_soc_driver, uart_devclass, 0, 0); Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/xlp_pci.c ============================================================================== --- user/jchandra/mips-xlp-support/sys/mips/nlm/xlp_pci.c Thu Jul 28 11:41:55 2011 (r224475) +++ user/jchandra/mips-xlp-support/sys/mips/nlm/xlp_pci.c Thu Jul 28 12:08:13 2011 (r224476) @@ -47,6 +47,9 @@ __FBSDID("$FreeBSD$"); #include <sys/pciio.h> #include <dev/pci/pcivar.h> #include <dev/pci/pcireg.h> +#include <dev/uart/uart.h> +#include <dev/uart/uart_bus.h> +#include <dev/uart/uart_cpu.h> #include <machine/bus.h> #include <machine/md_var.h> @@ -459,7 +462,7 @@ mips_platform_pci_teardown_intr(device_t static void assign_soc_resource(device_t child, int type, u_long *startp, u_long *endp, - u_long *countp, struct rman **rm, vm_offset_t *va) + u_long *countp, struct rman **rm, bus_space_tag_t *bst, vm_offset_t *va) { int devid = pci_get_device(child); int inst = pci_get_function(child); @@ -467,6 +470,7 @@ assign_soc_resource(device_t child, int *rm = NULL; *va = 0; + *bst = 0; switch (devid) { case PCI_DEVICE_ID_NLM_UART: switch (type) { @@ -475,10 +479,11 @@ assign_soc_resource(device_t child, int *countp = 1; break; case SYS_RES_MEMORY: - *va = nlm_regbase_uart(node, inst) + XLP_IO_PCI_HDRSZ; + *va = nlm_regbase_uart(node, inst) + XLP_IO_PCI_HDRSZ; *startp = MIPS_KSEG1_TO_PHYS(va); *countp = 0x100; *rm = &emul_rman; + *bst = uart_bus_space_mem; break; }; break; @@ -496,17 +501,21 @@ assign_soc_resource(device_t child, int } break; } + + /* default to rmi_bus_space for SoC resources */ + if (type == SYS_RES_MEMORY && *bst == 0) + *bst = rmi_bus_space; } static struct resource * xlp_pci_alloc_resource(device_t bus, device_t child, int type, int *rid, u_long start, u_long end, u_long count, u_int flags) { - struct rman *rm; + struct rman *rm = NULL; struct resource *rv; vm_offset_t va = 0; int needactivate = flags & RF_ACTIVE; - + bus_space_tag_t bst = 0; /* * For SoC PCI devices, we have to assign resources correctly @@ -516,7 +525,7 @@ xlp_pci_alloc_resource(device_t bus, dev if (pci_get_bus(child) == 0 && pci_get_vendor(child) == PCI_VENDOR_NETLOGIC) assign_soc_resource(child, type, &start, &end, - &count, &rm, &va); + &count, &rm, &bst, &va); if (rm == NULL) { switch (type) { case SYS_RES_IRQ: @@ -545,14 +554,12 @@ xlp_pci_alloc_resource(device_t bus, dev if (type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) { if (va == 0) va = (vm_offset_t)pmap_mapdev(start, count); + if (bst == 0) + bst = rmi_pci_bus_space; + rman_set_bushandle(rv, va); rman_set_virtual(rv, (void *)va); - - /* SoC devices don't need swap */ - if (pci_get_bus(child) != 0) - rman_set_bustag(rv, rmi_pci_bus_space); - else - rman_set_bustag(rv, rmi_bus_space); + rman_set_bustag(rv, bst); } if (needactivate) {
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