Date: Wed, 8 May 2019 10:41:01 +0000 (UTC) From: Hans Petter Selasky <hselasky@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r347275 - head/sys/dev/mlx5 Message-ID: <201905081041.x48Af1la046778@repo.freebsd.org>
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Author: hselasky Date: Wed May 8 10:41:00 2019 New Revision: 347275 URL: https://svnweb.freebsd.org/changeset/base/347275 Log: Enhance MCAM reg to allow query on access reg support in mlx5core. Enhance MCAM to allow the driver to query which access regs are supported. For now, expose the regs needed for FW flashing. Linux commit: 0ab87743cc8c5bcd482daf71961ed5fc45349e01 Submitted by: slavash@ MFC after: 3 days Sponsored by: Mellanox Technologies Modified: head/sys/dev/mlx5/device.h head/sys/dev/mlx5/mlx5_ifc.h Modified: head/sys/dev/mlx5/device.h ============================================================================== --- head/sys/dev/mlx5/device.h Wed May 8 10:40:41 2019 (r347274) +++ head/sys/dev/mlx5/device.h Wed May 8 10:41:00 2019 (r347275) @@ -1056,6 +1056,9 @@ enum mlx5_mcam_feature_groups { #define MLX5_CAP_MCAM_FEATURE(mdev, fld) \ MLX5_GET(mcam_reg, (mdev)->caps.mcam, mng_feature_cap_mask.enhanced_features.fld) +#define MLX5_CAP_MCAM_REG(mdev, reg) \ + MLX5_GET(mcam_reg, (mdev)->caps.mcam, mng_access_reg_cap_mask.access_regs.reg) + #define MLX5_CAP_QCAM_REG(mdev, fld) \ MLX5_GET(qcam_reg, (mdev)->caps.qcam, qos_access_reg_cap_mask.reg_cap.fld) Modified: head/sys/dev/mlx5/mlx5_ifc.h ============================================================================== --- head/sys/dev/mlx5/mlx5_ifc.h Wed May 8 10:40:41 2019 (r347274) +++ head/sys/dev/mlx5/mlx5_ifc.h Wed May 8 10:41:00 2019 (r347275) @@ -8585,6 +8585,18 @@ struct mlx5_ifc_mcam_enhanced_features_bits { u8 pcie_performance_group[0x1]; }; +struct mlx5_ifc_mcam_access_reg_bits { + u8 reserved_at_0[0x1c]; + u8 mcda[0x1]; + u8 mcc[0x1]; + u8 mcqi[0x1]; + u8 reserved_at_1f[0x1]; + + u8 regs_95_to_64[0x20]; + u8 regs_63_to_32[0x20]; + u8 regs_31_to_0[0x20]; +}; + struct mlx5_ifc_mcam_reg_bits { u8 reserved_at_0[0x8]; u8 feature_group[0x8]; @@ -8594,6 +8606,7 @@ struct mlx5_ifc_mcam_reg_bits { u8 reserved_at_20[0x20]; union { + struct mlx5_ifc_mcam_access_reg_bits access_regs; u8 reserved_at_0[0x80]; } mng_access_reg_cap_mask;
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