From owner-freebsd-embedded@FreeBSD.ORG Thu Jan 8 20:40:08 2015 Return-Path: Delivered-To: freebsd-embedded@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 823091B5; Thu, 8 Jan 2015 20:40:08 +0000 (UTC) Received: from kib.kiev.ua (kib.kiev.ua [IPv6:2001:470:d5e7:1::1]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id EA8406A8; Thu, 8 Jan 2015 20:40:07 +0000 (UTC) Received: from tom.home (kostik@localhost [127.0.0.1]) by kib.kiev.ua (8.14.9/8.14.9) with ESMTP id t08Ke1Yl051145 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 8 Jan 2015 22:40:01 +0200 (EET) (envelope-from kostikbel@gmail.com) DKIM-Filter: OpenDKIM Filter v2.9.2 kib.kiev.ua t08Ke1Yl051145 Received: (from kostik@localhost) by tom.home (8.14.9/8.14.9/Submit) id t08Ke0Om051139; Thu, 8 Jan 2015 22:40:00 +0200 (EET) (envelope-from kostikbel@gmail.com) X-Authentication-Warning: tom.home: kostik set sender to kostikbel@gmail.com using -f Date: Thu, 8 Jan 2015 22:40:00 +0200 From: Konstantin Belousov To: Micha?? Stanek Subject: Re: [PATCH] Add support for 64-bit AHCI BAR. Message-ID: <20150108203959.GR42409@kib.kiev.ua> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) X-Spam-Status: No, score=-2.0 required=5.0 tests=ALL_TRUSTED,BAYES_00, DKIM_ADSP_CUSTOM_MED,FREEMAIL_FROM,NML_ADSP_CUSTOM_MED autolearn=no autolearn_force=no version=3.4.0 X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on tom.home Cc: freebsd-current@freebsd.org, freebsd-embedded@freebsd.org X-BeenThere: freebsd-embedded@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Dedicated and Embedded Systems List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Jan 2015 20:40:08 -0000 On Thu, Jan 08, 2015 at 05:09:23PM +0100, Micha?? Stanek wrote: > Hello all, > > I ran into an issue with AHCI BAR allocation on arm64. The AHCI PCI driver > in sys/dev/ahci/ahci_pci.c assumes that ABAR (AHCI Base Address) register > is located at offset 0x24 (BAR5) in the PCI header. Specification for AHCI > confirms this is indeed the default address of the main BAR. Yes, at least rev. 1.3 of AHCI just states that ABAR must be at offset 0x24. > However, if > AHCI uses 64-bit base addresses, then this register consists of two dwords > starting at offset 0x20 - BAR4 and BAR5. This is the case on our arm64 > target and possibly other platforms using 64-bit BARs for AHCI. Is it specified anywhere, or just a quirk of the specific implementation ? If it is a quirk, would it make sense to also check the vendor or device id before applying the logic ? > > The following patch adds a check for the extended BAR in ahci_pci_attach() > and sets the 'rid' in bus_alloc_resource_any accordingly. It fixes the > allocation error on our platform. > > Please review and test this patch on other platforms. If there are no > issues then it will be committed in a week. >