Date: Wed, 14 Nov 2012 12:11:24 +0000 (UTC) From: Olivier Houchard <cognet@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r243026 - head/sys/arm/arm Message-ID: <201211141211.qAECBO5q068698@svn.freebsd.org>
next in thread | raw e-mail | index | archive | help
Author: cognet Date: Wed Nov 14 12:11:23 2012 New Revision: 243026 URL: http://svnweb.freebsd.org/changeset/base/243026 Log: Make it clear the L2 ops are filled for any cpu using a PL310 cache, not just the omap4. Spotted out by: Giovanni Trematerra <gianni at freebsd DOT org> Modified: head/sys/arm/arm/cpufunc.c Modified: head/sys/arm/arm/cpufunc.c ============================================================================== --- head/sys/arm/arm/cpufunc.c Wed Nov 14 11:05:16 2012 (r243025) +++ head/sys/arm/arm/cpufunc.c Wed Nov 14 12:11:23 2012 (r243026) @@ -1067,7 +1067,8 @@ struct cpu_functions cortexa_cpufuncs = armv7_idcache_wbinv_all, /* idcache_wbinv_all */ armv7_idcache_wbinv_range, /* idcache_wbinv_range */ - /* Note: From OMAP4 the L2 ops are filled in when the + /* + * Note: For CPUs using the PL310 the L2 ops are filled in when the * L2 cache controller is actually enabled. */ cpufunc_nullop, /* l2cache_wbinv_all */
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201211141211.qAECBO5q068698>