From owner-svn-src-all@freebsd.org Tue Nov 20 00:14:49 2018 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 06C81113041C; Tue, 20 Nov 2018 00:14:49 +0000 (UTC) (envelope-from nwhitehorn@freebsd.org) Received: from d.mail.sonic.net (d.mail.sonic.net [64.142.111.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 48E2B6BFE1; Tue, 20 Nov 2018 00:14:48 +0000 (UTC) (envelope-from nwhitehorn@freebsd.org) Received: from helicon.physics.ucla.edu (helicon.physics.ucla.edu [169.232.156.253]) (authenticated bits=0) by d.mail.sonic.net (8.15.1/8.15.1) with ESMTPSA id wAK03eMY030679 (version=TLSv1.2 cipher=AES128-SHA bits=128 verify=NOT); Mon, 19 Nov 2018 16:03:41 -0800 Subject: Re: svn commit: r340653 - in head/sys/powerpc: fpu include powerpc To: Justin Hibbits , src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org References: <201811192354.wAJNsnUu065339@repo.freebsd.org> From: Nathan Whitehorn Openpgp: preference=signencrypt Autocrypt: addr=nwhitehorn@freebsd.org; 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FreeBSD amd64; rv:60.0) Gecko/20100101 Thunderbird/60.3.0 MIME-Version: 1.0 In-Reply-To: <201811192354.wAJNsnUu065339@repo.freebsd.org> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Content-Language: en-US X-Sonic-CAuth: UmFuZG9tSVbaCRoI4LQ5ztd+H4sMh+2u2Wi1nDMrETb2PyVsBCE6jnFvxLZL5lP4o7q/lFjA9lEoKX17fwPHFOJ47n2ia3rzfKfQbLYBbU4= X-Sonic-ID: C;WEimvFfs6BGe5P+mSH5B5g== M;NFzevFfs6BGe5P+mSH5B5g== X-Spam-Flag: No X-Sonic-Spam-Details: 0.0/5.0 by cerberusd X-Rspamd-Queue-Id: 48E2B6BFE1 X-Spamd-Result: default: False [0.09 / 15.00]; local_wl_from(0.00)[freebsd.org]; NEURAL_HAM_MEDIUM(-0.39)[-0.392,0]; NEURAL_SPAM_SHORT(0.48)[0.481,0]; ASN(0.00)[asn:7065, ipnet:64.142.96.0/19, country:US] X-Rspamd-Server: mx1.freebsd.org X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 20 Nov 2018 00:14:49 -0000 Is this reasonable? What if the junk in the cache happened to be a *valid* instruction? Won't this approach result in silent corruption and later failure? -Nathan On 11/19/18 3:54 PM, Justin Hibbits wrote: > Author: jhibbits > Date: Mon Nov 19 23:54:49 2018 > New Revision: 340653 > URL: https://svnweb.freebsd.org/changeset/base/340653 > > Log: > powerpc: Sync icache on SIGILL, in case of cache issues > > The update of jemalloc to 5.1.0 exposed a cache syncing issue on a Freescale > e500 base system. There was already code in the FPU emulator to address > this, but it was limited to a single static variable, and did not attempt to > sync the cache. This pulls that out to the higher level program exception > handler, and syncs the cache. > > If a SIGILL is hit a second time at the same address, it will be treated as > a real illegal instruction, and handled accordingly. > > Modified: > head/sys/powerpc/fpu/fpu_emu.c > head/sys/powerpc/include/pcb.h > head/sys/powerpc/powerpc/exec_machdep.c > > Modified: head/sys/powerpc/fpu/fpu_emu.c > ============================================================================== > --- head/sys/powerpc/fpu/fpu_emu.c Mon Nov 19 22:18:18 2018 (r340652) > +++ head/sys/powerpc/fpu/fpu_emu.c Mon Nov 19 23:54:49 2018 (r340653) > @@ -189,7 +189,6 @@ fpu_emulate(struct trapframe *frame, struct fpu *fpf) > { > union instr insn; > struct fpemu fe; > - static int lastill = 0; > int sig; > > /* initialize insn.is_datasize to tell it is *not* initialized */ > @@ -243,17 +242,11 @@ fpu_emulate(struct trapframe *frame, struct fpu *fpf) > opc_disasm(frame->srr0, insn.i_int); > } > #endif > - /* > - * XXXX retry an illegal insn once due to cache issues. > - */ > - if (lastill == frame->srr0) { > - sig = SIGILL; > + sig = SIGILL; > #ifdef DEBUG > - if (fpe_debug & FPE_EX) > - kdb_enter(KDB_WHY_UNSET, "illegal instruction"); > + if (fpe_debug & FPE_EX) > + kdb_enter(KDB_WHY_UNSET, "illegal instruction"); > #endif > - } > - lastill = frame->srr0; > break; > } > > > Modified: head/sys/powerpc/include/pcb.h > ============================================================================== > --- head/sys/powerpc/include/pcb.h Mon Nov 19 22:18:18 2018 (r340652) > +++ head/sys/powerpc/include/pcb.h Mon Nov 19 23:54:49 2018 (r340653) > @@ -89,6 +89,7 @@ struct pcb { > register_t dbcr0; > } booke; > } pcb_cpu; > + vm_offset_t pcb_lastill; /* Last illegal instruction */ > }; > #endif > > > Modified: head/sys/powerpc/powerpc/exec_machdep.c > ============================================================================== > --- head/sys/powerpc/powerpc/exec_machdep.c Mon Nov 19 22:18:18 2018 (r340652) > +++ head/sys/powerpc/powerpc/exec_machdep.c Mon Nov 19 23:54:49 2018 (r340653) > @@ -94,6 +94,8 @@ __FBSDID("$FreeBSD$"); > #include > #include > > +#include > + > #ifdef FPU_EMU > #include > #endif > @@ -1099,6 +1101,14 @@ ppc_instr_emulate(struct trapframe *frame, struct pcb > } > sig = fpu_emulate(frame, &pcb->pcb_fpu); > #endif > + if (sig == SIGILL) { > + if (pcb->pcb_lastill != frame->srr0) { > + /* Allow a second chance, in case of cache sync issues. */ > + sig = 0; > + pmap_sync_icache(PCPU_GET(curpmap), frame->srr0, 4); > + pcb->pcb_lastill = frame->srr0; > + } > + } > > return (sig); > } >