From owner-freebsd-current@freebsd.org Mon Nov 30 18:20:28 2015 Return-Path: Delivered-To: freebsd-current@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 0D94AA3D89B; Mon, 30 Nov 2015 18:20:28 +0000 (UTC) (envelope-from jenkins-admin@FreeBSD.org) Received: from jenkins-9.freebsd.org (jenkins-9.freebsd.org [8.8.178.209]) by mx1.freebsd.org (Postfix) with ESMTP id ED9AC136D; Mon, 30 Nov 2015 18:20:27 +0000 (UTC) (envelope-from jenkins-admin@FreeBSD.org) Received: from jenkins-9.freebsd.org (localhost [127.0.0.1]) by jenkins-9.freebsd.org (Postfix) with ESMTP id D62591C40; Mon, 30 Nov 2015 18:20:27 +0000 (UTC) Date: Mon, 30 Nov 2015 18:20:21 +0000 (GMT) From: jenkins-admin@FreeBSD.org To: mmel@FreeBSD.org, ngie@FreeBSD.org, jenkins-admin@FreeBSD.org, freebsd-current@FreeBSD.org, freebsd-i386@FreeBSD.org Message-ID: <2062622331.313.1448907626700.JavaMail.jenkins@jenkins-9.freebsd.org> In-Reply-To: <727646234.309.1448899481254.JavaMail.jenkins@jenkins-9.freebsd.org> References: <727646234.309.1448899481254.JavaMail.jenkins@jenkins-9.freebsd.org> Subject: FreeBSD_HEAD_i386 - Build #1804 - Fixed MIME-Version: 1.0 X-Jenkins-Job: FreeBSD_HEAD_i386 X-Jenkins-Result: SUCCESS Precedence: bulk Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Content-Filtered-By: Mailman/MimeDel 2.1.20 X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.20 List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 30 Nov 2015 18:20:28 -0000 FreeBSD_HEAD_i386 - Build #1804 - Fixed: Build information: https://jenkins.FreeBSD.org/job/FreeBSD_HEAD_i386/1804/ Full change log: https://jenkins.FreeBSD.org/job/FreeBSD_HEAD_i386/1804/changes Full build log: https://jenkins.FreeBSD.org/job/FreeBSD_HEAD_i386/1804/console Change summaries: 291492 by mmel: ARM: create new memory attribute for writethrough cacheable memory. - add new TEX class for WT cacheable memory - export new TEX class to kernel as VM_MEMATTR_WT attribute - add new aliases VM_MEMATTR_WRITE_COMBINING and VM_MEMATTR_WRITE_BACK, it's used in DRM code Note: Only Cortex A8 supports WT caching in HW. On rest of Cortex CPUs, WT requests is treated as uncacheable. Approved by: kib (mentor) 291491 by ngie: Fix the build after ifconfig was converted over to lib80211 in r291470 Reported by: jenkins, O. Hartmann Pointyhat to: adrian