From owner-freebsd-arm@freebsd.org Fri Oct 25 14:51:45 2019 Return-Path: Delivered-To: freebsd-arm@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id A4BD4172C0B for ; Fri, 25 Oct 2019 14:51:45 +0000 (UTC) (envelope-from ian@freebsd.org) Received: from outbound2m.ore.mailhop.org (outbound2m.ore.mailhop.org [54.149.155.156]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 4706Wj3LSyz4bpT for ; Fri, 25 Oct 2019 14:51:45 +0000 (UTC) (envelope-from ian@freebsd.org) ARC-Seal: i=1; a=rsa-sha256; t=1572015104; cv=none; d=outbound.mailhop.org; s=arc-outbound20181012; b=UdbVUfTrgVN+7hVMp1zo8BdniapV1Eqw6oJb9yN3xIm1wJY215d9ClaNUDkfrAFcOIuHOucP4gKg5 NljnUQGRkMUV72bZMVf2p3owSGGfNRWiigwzBo4KxNCKb9bFQ520U8rWgSuRO+rIZ9n2R6iN7b9IeJ eUfemWnsqOFw09Ej8duxjnTTfo7zWjqMvYWRoR5gjUaoZq0PZurW224I2DZX8IfkIuCWm5vy9orx9q 3hYkOII2vQBpYc3qNUcUUDFe9aY4Tz1oimq2XX06e7vDlEOwJ8Gcm/owXh3f5LhAhqLr6EoHbbMkkF lJrACP2ky5t+h9aXWrDAPUggZuaom4Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=outbound.mailhop.org; s=arc-outbound20181012; h=content-transfer-encoding:mime-version:content-type:references:in-reply-to: date:cc:to:from:subject:message-id:dkim-signature:from; bh=72LHDr51CfUf3Yos4qC+Zt9bLyTLp4EnId28hP4i9x0=; b=aLP5/4U6FteKZKKu6Pxp0NPf7Tas8AoYyMbnLVByWSHqbyasLUm9o+N2tLZB0PZYxqup/35z1kPeZ ozHcDpS7RF5tPHUPmepDa7UTWXtnPiyzwYCJnKN76iBtFGoODqlcT9fSxI8UTvEwH5bBdgZ/N41JLT XUT69Br0Npr3t85a+vBZevJ9+6569rXas2QYOP2NYk3S03ZmJdn7jYBP1D6Qbfv3MCbWmep+t3pO9d i5+HAqIT0vHNBukuo6KDhkVcSmH2B7rFI1I8E9SsPYQYbacsMZNMNfTqNCQhouPfpeQrs0W6hUKSJc uvz4f/r9C6aL4rY+so1Qqp4gkbW/vYA== ARC-Authentication-Results: i=1; outbound4.ore.mailhop.org; spf=softfail smtp.mailfrom=freebsd.org smtp.remote-ip=67.177.211.60; dmarc=none header.from=freebsd.org; arc=none header.oldest-pass=0; DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=outbound.mailhop.org; s=dkim-high; h=content-transfer-encoding:mime-version:content-type:references:in-reply-to: date:cc:to:from:subject:message-id:from; bh=72LHDr51CfUf3Yos4qC+Zt9bLyTLp4EnId28hP4i9x0=; b=bRUEQ3rSWTjsyOsevdsHg047wV3wKUbKGpn+OVuj1ZeSvxgyzxPuolKX3Rb6a5P+3cGbsGOdZWrpN Dah9JlgshiTEtKdoN4fdfp0kPIvskb0IyPGYWGcaqjAkfJH5iaQKaoOiZ8CFbGdYASauJ0OVWt/JTY wjsR+GmxHngF9VG8Wc7CDOHX2NBHcWyUYQfRrxLIx+K48lKd6MXoJIBIYqykspujjney9HfPlkXaoh YLTGNmhX4fXekC+992LoRRURk0bcXXTs0kIxxX7GrOqCVcgrOa27+nKDl4fJi8wj7MjgsxDaXVyP4E FOQtQ/BzxoHh2mrp5j9X0jqBgt94YKA== X-MHO-RoutePath: aGlwcGll X-MHO-User: f4fb6740-f736-11e9-829e-79a40d15cccd X-Report-Abuse-To: https://support.duocircle.com/support/solutions/articles/5000540958-duocircle-standard-smtp-abuse-information X-Originating-IP: 67.177.211.60 X-Mail-Handler: DuoCircle Outbound SMTP Received: from ilsoft.org (unknown [67.177.211.60]) by outbound4.ore.mailhop.org (Halon) with ESMTPSA id f4fb6740-f736-11e9-829e-79a40d15cccd; Fri, 25 Oct 2019 14:51:43 +0000 (UTC) Received: from rev (rev [172.22.42.240]) by ilsoft.org (8.15.2/8.15.2) with ESMTP id x9PEpfpM049493; Fri, 25 Oct 2019 08:51:41 -0600 (MDT) (envelope-from ian@freebsd.org) Message-ID: Subject: Re: ucontext From: Ian Lepore To: Konstantin Belousov Cc: freebsd-arm@freebsd.org Date: Fri, 25 Oct 2019 08:51:41 -0600 In-Reply-To: <20191025144957.GE73312@kib.kiev.ua> References: <20191024141133.04fb0693@i11.co> <20191024145436.GX73312@kib.kiev.ua> <20191025104421.012c1e5e@i11.co> <20191025083803.GD73312@kib.kiev.ua> <78c9868cf23643dfa2f88694542e86251bde13e7.camel@freebsd.org> <20191025144957.GE73312@kib.kiev.ua> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5 FreeBSD GNOME Team Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-Rspamd-Queue-Id: 4706Wj3LSyz4bpT X-Spamd-Bar: - Authentication-Results: mx1.freebsd.org; none X-Spamd-Result: default: False [-1.87 / 15.00]; local_wl_from(0.00)[freebsd.org]; NEURAL_HAM_MEDIUM(-0.87)[-0.872,0]; NEURAL_HAM_LONG(-1.00)[-1.000,0]; ASN(0.00)[asn:16509, ipnet:54.148.0.0/15, country:US] X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 25 Oct 2019 14:51:45 -0000 On Fri, 2019-10-25 at 17:49 +0300, Konstantin Belousov wrote: > On Fri, Oct 25, 2019 at 08:26:19AM -0600, Ian Lepore wrote: > > On Fri, 2019-10-25 at 11:38 +0300, Konstantin Belousov wrote: > > > On Fri, Oct 25, 2019 at 10:44:21AM +0300, Nick Kostirya wrote: > > > > On Thu, 24 Oct 2019 17:54:36 +0300 > > > > Konstantin Belousov wrote: > > > > > > > > > > > > > > I believe you want > > > > > uc_context.__gregs[_REG_PC] > > > > > on arm (32bit) and > > > > > uc_context.mc_gpregs.gp_elr > > > > > on arm64 for aarch64. > > > > > > > > > > Sometimes the thumb bit (lowest bit in PC) leaks there, then > > > > > you should > > > > > mask it. > > > > > > > > Thanks! > > > > > > > > Although I did not understand your last phrase. > > > > There is leak of what? > > > > > > Leak of the thumb bit. ARM ARM specifies that in non-thumb mode, > > > pc must > > > be word-aligned, in thumb it is half-word aligned. A way to > > > enter thumb > > > mode is to execute BX or BLX instruction with the lowest bit of > > > the target > > > PC set to 1. > > > > > > Sometimes you might get pc with the bit 0 set, which should > > > be masked out then. This is a bigger issue for unwinders than > > > for simple > > > profilers. > > > > > > > Where can I read about it? > > > > > > ARM ARM (ARM architecture reference manual), available from > > > arm.com. > > > Or Google for it. > > > > > > > The kernel has some support for running thumb binaries, but I've > > never > > heard of anybody actually doing so on freebsd. Nobody has ever > > reported a bug related to running a thumb binary, and it would be > > astounding to me if we accidentally got everything in the kernel > > thumb > > support right on the first try without ever testing it. > > I am curious as well, isn't thumb completely transparent to the > kernel ? > I.e. my impression was that some code might be compiled into thumb, > and > then a thunk which does BX to the location, is used to switch to > thumb > mode. There is no new ELF machine type involved, or different > exception > entry mode, so it should just work ? > > And this is why I remember about this bit 0 issue, it caused some > problems > to libunwind on arm. > I think in the kernel it would appear in places like page fault handlers needing to mask off the lower bit. -- Ian