From owner-svn-src-head@FreeBSD.ORG Fri Sep 6 05:20:12 2013 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 8C9F9F6A; Fri, 6 Sep 2013 05:20:12 +0000 (UTC) (envelope-from grehan@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 79FBA2693; Fri, 6 Sep 2013 05:20:12 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.7/8.14.7) with ESMTP id r865KCtW003044; Fri, 6 Sep 2013 05:20:12 GMT (envelope-from grehan@svn.freebsd.org) Received: (from grehan@localhost) by svn.freebsd.org (8.14.7/8.14.5/Submit) id r865KCAN003040; Fri, 6 Sep 2013 05:20:12 GMT (envelope-from grehan@svn.freebsd.org) Message-Id: <201309060520.r865KCAN003040@svn.freebsd.org> From: Peter Grehan Date: Fri, 6 Sep 2013 05:20:12 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r255288 - head/sys/amd64/vmm X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 06 Sep 2013 05:20:12 -0000 Author: grehan Date: Fri Sep 6 05:20:11 2013 New Revision: 255288 URL: http://svnweb.freebsd.org/changeset/base/255288 Log: Emulate reading of the IA32_MISC_ENABLE MSR, by returning the host MSR and masking off features that aren't supported. Linux reads this MSR to detect if NX has been disabled via BIOS. Modified: head/sys/amd64/vmm/vmm_msr.c Modified: head/sys/amd64/vmm/vmm_msr.c ============================================================================== --- head/sys/amd64/vmm/vmm_msr.c Fri Sep 6 05:16:10 2013 (r255287) +++ head/sys/amd64/vmm/vmm_msr.c Fri Sep 6 05:20:11 2013 (r255288) @@ -57,6 +57,7 @@ static struct vmm_msr vmm_msr[] = { { MSR_PAT, VMM_MSR_F_EMULATE | VMM_MSR_F_INVALID }, { MSR_BIOS_SIGN,VMM_MSR_F_EMULATE }, { MSR_MCG_CAP, VMM_MSR_F_EMULATE | VMM_MSR_F_READONLY }, + { MSR_IA32_MISC_ENABLE, VMM_MSR_F_EMULATE | VMM_MSR_F_READONLY }, }; #define vmm_msr_num (sizeof(vmm_msr) / sizeof(vmm_msr[0])) @@ -91,7 +92,7 @@ void guest_msrs_init(struct vm *vm, int cpu) { int i; - uint64_t *guest_msrs; + uint64_t *guest_msrs, misc; guest_msrs = vm_guest_msrs(vm, cpu); @@ -115,6 +116,20 @@ guest_msrs_init(struct vm *vm, int cpu) PAT_VALUE(6, PAT_UNCACHED) | PAT_VALUE(7, PAT_UNCACHEABLE); break; + case MSR_IA32_MISC_ENABLE: + misc = rdmsr(MSR_IA32_MISC_ENABLE); + /* + * Set mandatory bits + * 11: branch trace disabled + * 12: PEBS unavailable + * Clear unsupported features + * 16: SpeedStep enable + * 18: enable MONITOR FSM + */ + misc |= (1 << 12) | (1 << 11); + misc &= ~((1 << 18) | (1 << 16)); + guest_msrs[i] = misc; + break; default: panic("guest_msrs_init: missing initialization for msr " "0x%0x", vmm_msr[i].num);