Date: Wed, 26 Jul 2023 09:43:07 -0400 From: Cheng Cui <cc@freebsd.org> To: Kevin Bowling <kevin.bowling@kev009.com> Cc: FreeBSD Net <freebsd-net@freebsd.org> Subject: Re: CFT: lem(4), em(4) e1000 Ethernet TSO testing Message-ID: <CAGaXui%2BAkHmS-m6y0CtRB6-v5k1ikzKigF-oL14mfk6Sbt8pkQ@mail.gmail.com> In-Reply-To: <CAK7dMtDrugPGtasdYi=U0gJ3P_6bfGyB5EXf2haY4gmHDuyAWA@mail.gmail.com> References: <CAK7dMtDrugPGtasdYi=U0gJ3P_6bfGyB5EXf2haY4gmHDuyAWA@mail.gmail.com>
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--000000000000bb8621060164075d Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable I didn't see your post covering 82541 or 82546 chips. Does this new em(4) change support TSO on these chips? If yes, I would be happy to test it on them. root@s1:~ # dmesg | grep 8254 Timecounter "i8254" frequency 1193182 Hz quality 0 Event timer "i8254" frequency 1193182 Hz quality 100 em0: <Intel(R) Legacy PRO/1000 MT *82541GI*> port 0xdcc0-0xdcff mem 0xdfae0000-0xdfafffff irq 64 at device 7.0 on pci6 em1: <Intel(R) Legacy PRO/1000 MT 82541GI> port 0xccc0-0xccff mem 0xdf8e0000-0xdf8fffff irq 65 at device 8.0 on pci7 em2: <Intel(R) Legacy PRO/1000 MT *82546EB* (Copper)> port 0xbcc0-0xbcff mem 0xdf5e0000-0xdf5fffff irq 106 at device 4.0 on pci9 em3: <Intel(R) Legacy PRO/1000 MT 82546EB (Copper)> port 0xbc80-0xbcbf mem 0xdf5c0000-0xdf5dffff irq 107 at device 4.1 on pci9 em4: <Intel(R) Legacy PRO/1000 MT 82546EB (Copper)> port 0xacc0-0xacff mem 0xdf3e0000-0xdf3fffff irq 101 at device 3.0 on pci10 em5: <Intel(R) Legacy PRO/1000 MT 82546EB (Copper)> port 0xac80-0xacbf mem 0xdf3c0000-0xdf3dffff irq 102 at device 3.1 on pci10 Best Regards, Cheng Cui On Tue, Jul 25, 2023 at 10:38=E2=80=AFPM Kevin Bowling <kevin.bowling@kev00= 9.com> wrote: > Hi, > > I have been working through various bugs and have come to a point > where TSO is working on systems I have available for testing. > > This results in higher throughput on resource constrained systems, and > less CPU/power usage on unconstrained systems. > > As of this mail, you will need to manually apply > https://reviews.freebsd.org/D41170 on top of main to use TSO6 on > em(4). > > I plan to enable TSO by default for lem(4) and em(4) during the > FreeBSD 14 release cycle, so I would appreciate testing to address any > remaining issues. Below, a list of chipsets that will be exempt due > to known issues. > > lem(4) exclusions: > * <82544 (although it does seem ok to manually enable for emulations > in qemu, virtualbox, etc) > * 82547 > > em(4) exclusions.. These chips have a stability workaround for high > throughput with rapid link-flap applied that results in the TSO engine > not being able to run at line speed. Thus, TSO would not be enabled > by default here: > * Intel(R) I219-LM and I219-V > * Intel(R) I219-LM and I219-V (2) > * Intel(R) I219-LM and I219-V (3) > * Intel(R) I219-LM and I219-V (4) > * Intel(R) I219-LM and I219-V (5) > > Regards, > Kevin Bowling > > --000000000000bb8621060164075d Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable <div dir=3D"ltr"><div>I didn't see your post covering 82541 or 82546 ch= ips. Does this new em(4) change support TSO on these chips? If yes, I would= be happy to test it on them.<br></div><div><br></div><div>root@s1:~ # dmes= g | grep 8254<br>Timecounter "i8254" frequency 1193182 Hz quality= 0<br>Event timer "i8254" frequency 1193182 Hz quality 100<br>em0= : <Intel(R) Legacy PRO/1000 MT <b>82541GI</b>> port 0xdcc0-0xdcff mem= 0xdfae0000-0xdfafffff irq 64 at device 7.0 on pci6<br>em1: <Intel(R) Le= gacy PRO/1000 MT 82541GI> port 0xccc0-0xccff mem 0xdf8e0000-0xdf8fffff i= rq 65 at device 8.0 on pci7<br>em2: <Intel(R) Legacy PRO/1000 MT <b>8254= 6EB</b> (Copper)> port 0xbcc0-0xbcff mem 0xdf5e0000-0xdf5fffff irq 106 a= t device 4.0 on pci9<br>em3: <Intel(R) Legacy PRO/1000 MT 82546EB (Coppe= r)> port 0xbc80-0xbcbf mem 0xdf5c0000-0xdf5dffff irq 107 at device 4.1 o= n pci9<br>em4: <Intel(R) Legacy PRO/1000 MT 82546EB (Copper)> port 0x= acc0-0xacff mem 0xdf3e0000-0xdf3fffff irq 101 at device 3.0 on pci10<br>em5= : <Intel(R) Legacy PRO/1000 MT 82546EB (Copper)> port 0xac80-0xacbf m= em 0xdf3c0000-0xdf3dffff irq 102 at device 3.1 on pci10<br></div><div dir= =3D"ltr"><div><div dir=3D"ltr" class=3D"gmail_signature"><div dir=3D"ltr"><= div><br></div>Best Regards,<div>Cheng Cui</div></div></div></div><br></div>= <br><div class=3D"gmail_quote"><div dir=3D"ltr" class=3D"gmail_attr">On Tue= , Jul 25, 2023 at 10:38=E2=80=AFPM Kevin Bowling <<a href=3D"mailto:kevi= n.bowling@kev009.com">kevin.bowling@kev009.com</a>> wrote:<br></div><blo= ckquote class=3D"gmail_quote" style=3D"margin:0px 0px 0px 0.8ex;border-left= :1px solid rgb(204,204,204);padding-left:1ex">Hi,<br> <br> I have been working through various bugs and have come to a point<br> where TSO is working on systems I have available for testing.<br> <br> This results in higher throughput on resource constrained systems, and<br> less CPU/power usage on unconstrained systems.<br> <br> As of this mail, you will need to manually apply<br> <a href=3D"https://reviews.freebsd.org/D41170" rel=3D"noreferrer" target=3D= "_blank">https://reviews.freebsd.org/D41170</a> on top of main to use TSO6 = on<br> em(4).<br> <br> I plan to enable TSO by default for lem(4) and em(4) during the<br> FreeBSD 14 release cycle, so I would appreciate testing to address any<br> remaining issues.=C2=A0 Below, a list of chipsets that will be exempt due<b= r> to known issues.<br> <br> lem(4) exclusions:<br> * <82544 (although it does seem ok to manually enable for emulations<br> in qemu, virtualbox, etc)<br> * 82547<br> <br> em(4) exclusions.. These chips have a stability workaround for high<br> throughput with rapid link-flap applied that results in the TSO engine<br> not being able to run at line speed.=C2=A0 Thus, TSO would not be enabled<b= r> by default here:<br> * Intel(R) I219-LM and I219-V<br> * Intel(R) I219-LM and I219-V (2)<br> * Intel(R) I219-LM and I219-V (3)<br> * Intel(R) I219-LM and I219-V (4)<br> * Intel(R) I219-LM and I219-V (5)<br> <br> Regards,<br> Kevin Bowling<br> <br> </blockquote></div></div> --000000000000bb8621060164075d--
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