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Date:      Fri, 8 Jul 2016 21:34:39 +0000 (UTC)
From:      Adrian Chadd <adrian@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r302461 - in head/sys: contrib/dev/ath/ath_hal/ar9300 dev/ath dev/ath/ath_hal dev/ath/ath_hal/ar5210 dev/ath/ath_hal/ar5211 dev/ath/ath_hal/ar5212 dev/ath/ath_hal/ar5416
Message-ID:  <201607082134.u68LYdVN076708@repo.freebsd.org>

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Author: adrian
Date: Fri Jul  8 21:34:39 2016
New Revision: 302461
URL: https://svnweb.freebsd.org/changeset/base/302461

Log:
  [ath_hal] retire a "long RX desc" flag, store/use the TX/RX timestamp length.
  
  * the code already stored the length of the RX desc, which I never used.
    So, use that and retire the new flag I introduced a while ago.
  * Introduce a TX timestamp length field and capability.

Modified:
  head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_attach.c
  head/sys/dev/ath/ath_hal/ah.c
  head/sys/dev/ath/ath_hal/ah.h
  head/sys/dev/ath/ath_hal/ah_internal.h
  head/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c
  head/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c
  head/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
  head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
  head/sys/dev/ath/if_ath.c

Modified: head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_attach.c
==============================================================================
--- head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_attach.c	Fri Jul  8 21:30:18 2016	(r302460)
+++ head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_attach.c	Fri Jul  8 21:34:39 2016	(r302461)
@@ -2878,7 +2878,6 @@ ar9300_fill_capability_info(struct ath_h
 #if ATH_SUPPORT_SPECTRAL
     p_cap->halSpectralScanSupport = AH_TRUE;
 #endif
-
     ahpriv->ah_rfsilent = ar9300_eeprom_get(ahp, EEP_RF_SILENT);
     if (ahpriv->ah_rfsilent & EEP_RFSILENT_ENABLED) {
         ahp->ah_gpio_select = MS(ahpriv->ah_rfsilent, EEP_RFSILENT_GPIO_SEL);
@@ -2998,8 +2997,8 @@ ar9300_fill_capability_info(struct ath_h
     p_cap->hal_cfend_fix_support = AH_FALSE;
     p_cap->hal_aggr_extra_delim_war = AH_FALSE;
 #endif
-    p_cap->halHasLongRxDescTsf = AH_TRUE;
-//    p_cap->hal_rx_desc_timestamp_bits = 32;
+    p_cap->halTxTstampPrecision = 32;
+    p_cap->halRxTstampPrecision = 32;
     p_cap->halRxTxAbortSupport = AH_TRUE;
     p_cap->hal_ani_poll_interval = AR9300_ANI_POLLINTERVAL;
     p_cap->hal_channel_switch_time_usec = AR9300_CHANNEL_SWITCH_TIME_USEC;

Modified: head/sys/dev/ath/ath_hal/ah.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ah.c	Fri Jul  8 21:30:18 2016	(r302460)
+++ head/sys/dev/ath/ath_hal/ah.c	Fri Jul  8 21:34:39 2016	(r302461)
@@ -749,7 +749,7 @@ ath_hal_getcapability(struct ath_hal *ah
 	case HAL_CAP_HT20_SGI:
 		return pCap->halHTSGI20Support ? HAL_OK : HAL_ENOTSUPP;
 	case HAL_CAP_RXTSTAMP_PREC:	/* rx desc tstamp precision (bits) */
-		*result = pCap->halTstampPrecision;
+		*result = pCap->halRxTstampPrecision;
 		return HAL_OK;
 	case HAL_CAP_ANT_DIV_COMB:	/* AR9285/AR9485 LNA diversity */
 		return pCap->halAntDivCombSupport ? HAL_OK  : HAL_ENOTSUPP;
@@ -778,8 +778,6 @@ ath_hal_getcapability(struct ath_hal *ah
 		}
 	case HAL_CAP_RXDESC_SELFLINK:	/* hardware supports self-linked final RX descriptors correctly */
 		return pCap->halHasRxSelfLinkedTail ? HAL_OK : HAL_ENOTSUPP;
-	case HAL_CAP_LONG_RXDESC_TSF:		/* 32 bit TSF in RX descriptor? */
-		return pCap->halHasLongRxDescTsf ? HAL_OK : HAL_ENOTSUPP;
 	case HAL_CAP_BB_READ_WAR:		/* Baseband read WAR */
 		return pCap->halHasBBReadWar? HAL_OK : HAL_ENOTSUPP;
 	case HAL_CAP_SERIALISE_WAR:		/* PCI register serialisation */
@@ -791,6 +789,9 @@ ath_hal_getcapability(struct ath_hal *ah
 		return pCap->halRxUsingLnaMixing ? HAL_OK : HAL_ENOTSUPP;
 	case HAL_CAP_DO_MYBEACON:	/* Hardware supports filtering my-beacons */
 		return pCap->halRxDoMyBeacon ? HAL_OK : HAL_ENOTSUPP;
+	case HAL_CAP_TXTSTAMP_PREC:	/* tx desc tstamp precision (bits) */
+		*result = pCap->halTxTstampPrecision;
+		return HAL_OK;
 	default:
 		return HAL_EINVAL;
 	}

Modified: head/sys/dev/ath/ath_hal/ah.h
==============================================================================
--- head/sys/dev/ath/ath_hal/ah.h	Fri Jul  8 21:30:18 2016	(r302460)
+++ head/sys/dev/ath/ath_hal/ah.h	Fri Jul  8 21:34:39 2016	(r302461)
@@ -194,12 +194,12 @@ typedef enum {
 	HAL_CAP_BSSIDMATCH	= 238,	/* hardware has disable bssid match */
 	HAL_CAP_STREAMS		= 239,	/* how many 802.11n spatial streams are available */
 	HAL_CAP_RXDESC_SELFLINK	= 242,	/* support a self-linked tail RX descriptor */
-	HAL_CAP_LONG_RXDESC_TSF	= 243,	/* hardware supports 32bit TSF in RX descriptor */
 	HAL_CAP_BB_READ_WAR	= 244,	/* baseband read WAR */
 	HAL_CAP_SERIALISE_WAR	= 245,	/* serialise register access on PCI */
 	HAL_CAP_ENFORCE_TXOP	= 246,	/* Enforce TXOP if supported */
 	HAL_CAP_RX_LNA_MIXING	= 247,	/* RX hardware uses LNA mixing */
 	HAL_CAP_DO_MYBEACON	= 248,	/* Supports HAL_RX_FILTER_MYBEACON */
+	HAL_CAP_TXTSTAMP_PREC	= 250,	/* tx desc tstamp precision (bits) */
 } HAL_CAPABILITY_TYPE;
 
 /* 

Modified: head/sys/dev/ath/ath_hal/ah_internal.h
==============================================================================
--- head/sys/dev/ath/ath_hal/ah_internal.h	Fri Jul  8 21:30:18 2016	(r302460)
+++ head/sys/dev/ath/ath_hal/ah_internal.h	Fri Jul  8 21:34:39 2016	(r302461)
@@ -260,7 +260,6 @@ typedef struct {
 			hal4kbSplitTransSupport		: 1,
 			halHasRxSelfLinkedTail		: 1,
 			halSupportsFastClock5GHz	: 1,
-			halHasLongRxDescTsf		: 1,
 			halHasBBReadWar			: 1,
 			halSerialiseRegWar		: 1,
 			halMciSupport			: 1,
@@ -290,7 +289,8 @@ typedef struct {
 	uint16_t	halKeyCacheSize;
 	uint16_t	halLow5GhzChan, halHigh5GhzChan;
 	uint16_t	halLow2GhzChan, halHigh2GhzChan;
-	int		halTstampPrecision;
+	int		halTxTstampPrecision;
+	int		halRxTstampPrecision;
 	int		halRtsAggrLimit;
 	uint8_t		halTxChainMask;
 	uint8_t		halRxChainMask;

Modified: head/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c	Fri Jul  8 21:30:18 2016	(r302460)
+++ head/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c	Fri Jul  8 21:34:39 2016	(r302461)
@@ -390,7 +390,8 @@ ar5210FillCapabilityInfo(struct ath_hal 
 		pCap->halRfSilentSupport = AH_TRUE;
 	}
 
-	pCap->halTstampPrecision = 15;		/* NB: s/w extended from 13 */
+	pCap->halTxTstampPrecision = 16;
+	pCap->halRxTstampPrecision = 15;	/* NB: s/w extended from 13 */
 	pCap->halIntrMask = (HAL_INT_COMMON - HAL_INT_BNR)
 			| HAL_INT_RX
 			| HAL_INT_TX

Modified: head/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c	Fri Jul  8 21:30:18 2016	(r302460)
+++ head/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c	Fri Jul  8 21:34:39 2016	(r302461)
@@ -520,7 +520,8 @@ ar5211FillCapabilityInfo(struct ath_hal 
 		pCap->halRfSilentSupport = AH_TRUE;
 	}
 
-	pCap->halTstampPrecision = 13;
+	pCap->halRxTstampPrecision = 13;
+	pCap->halTxTstampPrecision = 16;
 	pCap->halIntrMask = HAL_INT_COMMON
 			| HAL_INT_RX
 			| HAL_INT_TX

Modified: head/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c	Fri Jul  8 21:30:18 2016	(r302460)
+++ head/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c	Fri Jul  8 21:34:39 2016	(r302461)
@@ -899,7 +899,8 @@ ar5212FillCapabilityInfo(struct ath_hal 
 		pCap->halBssidMatchSupport = AH_TRUE;
 	}
 
-	pCap->halTstampPrecision = 15;
+	pCap->halRxTstampPrecision = 15;
+	pCap->halTxTstampPrecision = 16;
 	pCap->halIntrMask = HAL_INT_COMMON
 			| HAL_INT_RX
 			| HAL_INT_TX

Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c	Fri Jul  8 21:30:18 2016	(r302460)
+++ head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c	Fri Jul  8 21:34:39 2016	(r302461)
@@ -967,7 +967,8 @@ ar5416FillCapabilityInfo(struct ath_hal 
 	pCap->halChanHalfRate = AH_TRUE;
 	pCap->halChanQuarterRate = AH_TRUE;
 
-	pCap->halTstampPrecision = 32;
+	pCap->halTxTstampPrecision = 32;
+	pCap->halRxTstampPrecision = 32;
 	pCap->halHwPhyCounterSupport = AH_TRUE;
 	pCap->halIntrMask = HAL_INT_COMMON
 			| HAL_INT_RX
@@ -1019,8 +1020,6 @@ ar5416FillCapabilityInfo(struct ath_hal 
 	pCap->halGTTSupport = AH_TRUE;
 	pCap->halCSTSupport = AH_TRUE;
 	pCap->halEnhancedDfsSupport = AH_FALSE;
-	/* Hardware supports 32 bit TSF values in the RX descriptor */
-	pCap->halHasLongRxDescTsf = AH_TRUE;
 	/*
 	 * BB Read WAR: this is only for AR5008/AR9001 NICs
 	 * It is also set individually in the AR91xx attach functions.

Modified: head/sys/dev/ath/if_ath.c
==============================================================================
--- head/sys/dev/ath/if_ath.c	Fri Jul  8 21:30:18 2016	(r302460)
+++ head/sys/dev/ath/if_ath.c	Fri Jul  8 21:34:39 2016	(r302461)
@@ -971,7 +971,20 @@ ath_attach(u_int16_t devid, struct ath_s
 	sc->sc_hasbmatch = ath_hal_hasbssidmatch(ah);
 	sc->sc_hastsfadd = ath_hal_hastsfadjust(ah);
 	sc->sc_rxslink = ath_hal_self_linked_final_rxdesc(ah);
-	sc->sc_rxtsf32 = ath_hal_has_long_rxdesc_tsf(ah);
+
+	/* XXX TODO: just make this a "store tx/rx timestamp length" operation */
+	if (ath_hal_get_rx_tsf_prec(ah, &i)) {
+		if (i == 32) {
+			sc->sc_rxtsf32 = 1;
+		}
+		if (bootverbose)
+			device_printf(sc->sc_dev, "RX timestamp: %d bits\n", i);
+	}
+	if (ath_hal_get_tx_tsf_prec(ah, &i)) {
+		if (bootverbose)
+			device_printf(sc->sc_dev, "TX timestamp: %d bits\n", i);
+	}
+
 	sc->sc_hasenforcetxop = ath_hal_hasenforcetxop(ah);
 	sc->sc_rx_lnamixer = ath_hal_hasrxlnamixer(ah);
 	sc->sc_hasdivcomb = ath_hal_hasdivantcomb(ah);

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