From owner-svn-src-head@freebsd.org Thu Dec 15 02:05:30 2016 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id D9D26C800F8; Thu, 15 Dec 2016 02:05:30 +0000 (UTC) (envelope-from np@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 9A5A21CE; Thu, 15 Dec 2016 02:05:30 +0000 (UTC) (envelope-from np@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id uBF25T6T039367; Thu, 15 Dec 2016 02:05:29 GMT (envelope-from np@FreeBSD.org) Received: (from np@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id uBF25T3O039363; Thu, 15 Dec 2016 02:05:29 GMT (envelope-from np@FreeBSD.org) Message-Id: <201612150205.uBF25T3O039363@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: np set sender to np@FreeBSD.org using -f From: Navdeep Parhar Date: Thu, 15 Dec 2016 02:05:29 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r310100 - in head/sys/dev/cxgbe: . common X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 15 Dec 2016 02:05:31 -0000 Author: np Date: Thu Dec 15 02:05:29 2016 New Revision: 310100 URL: https://svnweb.freebsd.org/changeset/base/310100 Log: cxgbe(4): Deal with compressed error vectors. MFC after: 3 days Sponsored by: Chelsio Communications Modified: head/sys/dev/cxgbe/common/common.h head/sys/dev/cxgbe/common/t4_hw.c head/sys/dev/cxgbe/common/t4_msg.h head/sys/dev/cxgbe/t4_sge.c Modified: head/sys/dev/cxgbe/common/common.h ============================================================================== --- head/sys/dev/cxgbe/common/common.h Thu Dec 15 01:45:31 2016 (r310099) +++ head/sys/dev/cxgbe/common/common.h Thu Dec 15 02:05:29 2016 (r310100) @@ -227,7 +227,7 @@ struct tp_params { uint32_t vlan_pri_map; uint32_t ingress_config; - uint32_t rx_pkt_encap; + __be16 err_vec_mask; int8_t fcoe_shift; int8_t port_shift; Modified: head/sys/dev/cxgbe/common/t4_hw.c ============================================================================== --- head/sys/dev/cxgbe/common/t4_hw.c Thu Dec 15 01:45:31 2016 (r310099) +++ head/sys/dev/cxgbe/common/t4_hw.c Thu Dec 15 02:05:29 2016 (r310100) @@ -8020,12 +8020,17 @@ int t4_init_tp_params(struct adapter *ad read_filter_mode_and_ingress_config(adap); /* - * For T6, cache the adapter's compressed error vector - * and passing outer header info for encapsulated packets. + * Cache a mask of the bits that represent the error vector portion of + * rx_pkt.err_vec. T6+ can use a compressed error vector to make room + * for information about outer encapsulation (GENEVE/VXLAN/NVGRE). */ + tpp->err_vec_mask = htobe16(0xffff); if (chip_id(adap) > CHELSIO_T5) { v = t4_read_reg(adap, A_TP_OUT_CONFIG); - tpp->rx_pkt_encap = (v & F_CRXPKTENC) ? 1 : 0; + if (v & F_CRXPKTENC) { + tpp->err_vec_mask = + htobe16(V_T6_COMPR_RXERR_VEC(M_T6_COMPR_RXERR_VEC)); + } } return 0; Modified: head/sys/dev/cxgbe/common/t4_msg.h ============================================================================== --- head/sys/dev/cxgbe/common/t4_msg.h Thu Dec 15 01:45:31 2016 (r310099) +++ head/sys/dev/cxgbe/common/t4_msg.h Thu Dec 15 02:05:29 2016 (r310100) @@ -2014,7 +2014,7 @@ struct cpl_rx_pkt { #define S_T6_COMPR_RXERR_VEC 0 #define M_T6_COMPR_RXERR_VEC 0x3F -#define V_T6_COMPR_RXERR_VEC(x) ((x) << S_T6_COMPR_RXERR_LEN) +#define V_T6_COMPR_RXERR_VEC(x) ((x) << S_T6_COMPR_RXERR_VEC) #define G_T6_COMPR_RXERR_VEC(x) \ (((x) >> S_T6_COMPR_RXERR_VEC) & M_T6_COMPR_RXERR_VEC) Modified: head/sys/dev/cxgbe/t4_sge.c ============================================================================== --- head/sys/dev/cxgbe/t4_sge.c Thu Dec 15 01:45:31 2016 (r310099) +++ head/sys/dev/cxgbe/t4_sge.c Thu Dec 15 02:05:29 2016 (r310100) @@ -1808,7 +1808,7 @@ t4_eth_rx(struct sge_iq *iq, const struc M_HASHTYPE_SET(m0, sw_hashtype[rss->hash_type][rss->ipv6]); m0->m_pkthdr.flowid = be32toh(rss->hash_val); - if (cpl->csum_calc && !cpl->err_vec) { + if (cpl->csum_calc && !(cpl->err_vec & sc->params.tp.err_vec_mask)) { if (ifp->if_capenable & IFCAP_RXCSUM && cpl->l2info & htobe32(F_RXF_IP)) { m0->m_pkthdr.csum_flags = (CSUM_IP_CHECKED |