From owner-svn-src-all@FreeBSD.ORG Tue Jan 13 07:49:09 2015 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 974E1968; Tue, 13 Jan 2015 07:49:09 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 69D0260E; Tue, 13 Jan 2015 07:49:09 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id t0D7n9oo040283; Tue, 13 Jan 2015 07:49:09 GMT (envelope-from ganbold@FreeBSD.org) Received: (from ganbold@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id t0D7n8jv040279; Tue, 13 Jan 2015 07:49:08 GMT (envelope-from ganbold@FreeBSD.org) Message-Id: <201501130749.t0D7n8jv040279@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: ganbold set sender to ganbold@FreeBSD.org using -f From: Ganbold Tsagaankhuu Date: Tue, 13 Jan 2015 07:49:08 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r277116 - in head/sys/arm: arm include X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 13 Jan 2015 07:49:09 -0000 Author: ganbold Date: Tue Jan 13 07:49:07 2015 New Revision: 277116 URL: https://svnweb.freebsd.org/changeset/base/277116 Log: Add CPU ID for ARM Cortex A17. Approved by: stas (mentor) Modified: head/sys/arm/arm/cpufunc.c head/sys/arm/arm/identcpu.c head/sys/arm/include/armreg.h Modified: head/sys/arm/arm/cpufunc.c ============================================================================== --- head/sys/arm/arm/cpufunc.c Tue Jan 13 07:46:21 2015 (r277115) +++ head/sys/arm/arm/cpufunc.c Tue Jan 13 07:49:07 2015 (r277116) @@ -1071,6 +1071,7 @@ set_cpufuncs() cputype == CPU_ID_CORTEXA15R1 || cputype == CPU_ID_CORTEXA15R2 || cputype == CPU_ID_CORTEXA15R3 || + cputype == CPU_ID_CORTEXA17 || cputype == CPU_ID_KRAIT ) { cpufuncs = cortexa_cpufuncs; cpu_reset_needs_v4_MMU_disable = 1; /* V4 or higher */ Modified: head/sys/arm/arm/identcpu.c ============================================================================== --- head/sys/arm/arm/identcpu.c Tue Jan 13 07:46:21 2015 (r277115) +++ head/sys/arm/arm/identcpu.c Tue Jan 13 07:49:07 2015 (r277116) @@ -193,6 +193,8 @@ const struct cpuidtab cpuids[] = { generic_steppings }, { CPU_ID_CORTEXA15R3, CPU_CLASS_CORTEXA, "Cortex A15-r3", generic_steppings }, + { CPU_ID_CORTEXA17, CPU_CLASS_CORTEXA, "Cortex A17", + generic_steppings }, { CPU_ID_KRAIT, CPU_CLASS_KRAIT, "Krait", generic_steppings }, Modified: head/sys/arm/include/armreg.h ============================================================================== --- head/sys/arm/include/armreg.h Tue Jan 13 07:46:21 2015 (r277115) +++ head/sys/arm/include/armreg.h Tue Jan 13 07:49:07 2015 (r277116) @@ -137,6 +137,7 @@ #define CPU_ID_CORTEXA15R1 0x411fc0f0 #define CPU_ID_CORTEXA15R2 0x412fc0f0 #define CPU_ID_CORTEXA15R3 0x413fc0f0 +#define CPU_ID_CORTEXA17 0x410fc0d0 #define CPU_ID_KRAIT 0x510f06f0 /* Snapdragon S4 Pro/APQ8064 */ #define CPU_ID_TI925T 0x54029250 #define CPU_ID_MV88FR131 0x56251310 /* Marvell Feroceon 88FR131 Core */