From owner-freebsd-hackers Sat Dec 13 22:58:52 1997 Return-Path: Received: (from root@localhost) by hub.freebsd.org (8.8.7/8.8.7) id WAA15732 for hackers-outgoing; Sat, 13 Dec 1997 22:58:52 -0800 (PST) (envelope-from owner-freebsd-hackers) Received: from rah.star-gate.com (rah.star-gate.com [204.188.121.18]) by hub.freebsd.org (8.8.7/8.8.7) with ESMTP id WAA15719 for ; Sat, 13 Dec 1997 22:58:44 -0800 (PST) (envelope-from hasty@rah.star-gate.com) Received: from rah.star-gate.com (localhost.star-gate.com [127.0.0.1]) by rah.star-gate.com (8.8.8/8.8.8) with ESMTP id WAA09916; Sat, 13 Dec 1997 22:58:35 -0800 (PST) (envelope-from hasty@rah.star-gate.com) Message-Id: <199712140658.WAA09916@rah.star-gate.com> X-Mailer: exmh version 2.0gamma 1/27/96 To: wakkym@juno.com (Lee Cremeans) cc: hackers@FreeBSD.ORG Subject: Re: Beginning SPARC port In-reply-to: Your message of "Sun, 14 Dec 1997 01:31:56 EST." <19971214.012956.5303.3.wakkym@juno.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Sat, 13 Dec 1997 22:58:35 -0800 From: Amancio Hasty Sender: owner-freebsd-hackers@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk Which is fine for most PCI devices that I have at least programmed the registers are i/o mapped registers. pci_conf_read/pci_conf_write is a high level interface to the PCI registers now if you are looking for a higher abstraction please elaborate. Amancio > > On Sat, 13 Dec 1997 21:51:10 -0800 Amancio Hasty > writes: > >The functions is already there: > > > > old_irq = pci_conf_read(tag, PCI_INTERRUPT_REG); > > pci_conf_write(tag, PCI_INTERRUPT_REG, BROOKTREE_IRQ); > > > >And usually PCI devices have i/o mapped registers. > > On the i386, this is true, but (as has been said before, but I guess not > as clearly) there are architectures out there that don't have an > Intel-style I/O vs. memory addressing distinction (the 680x0s are like > this, and I think the SPARC and PowerPC are also; not sure about Alpha), > so they map all the device registers into physical memory space. >