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Wed, 15 Nov 2017 23:23:21 JST X-Mailer: YahooMailWebService/0.8.111_74 X-YMail-JAS: BS2yY5QVM1lHBMcKwTTITDYotRFb4kPzdrfwnE15htW.DIt1yiW0UjiIrH9N0rhQm.YEcqx6oEf0bnyduWIhnBj7lEHnv2NHOXITcomNuwJnWJwKp6BoUiPV5Kd_jDDuIm0k References: <1510699808.25350.3@smtp.office.plausible.coop> Date: Wed, 15 Nov 2017 23:23:21 +0900 (JST) From: Mori Hiroki Reply-To: Mori Hiroki Subject: Re: MIPS INTRNG changes To: Landon J Fuller , "freebsd-mips@freebsd.org" In-Reply-To: <1510699808.25350.3@smtp.office.plausible.coop> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: quoted-printable X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 15 Nov 2017 14:23:29 -0000 Hi=0A=0Asys/mips/atheros/ar531x/ is non-FDT and INTERNG.=0A=0AI will check = this patch on real cpu tomorrow.=0A=0AHiroki Mori=A0=0A=0A=0A----- Original= Message -----=0A> From: Landon J Fuller =0A> To: free= bsd-mips@freebsd.org=0A> Cc: =0A> Date: 2017/11/15, Wed 07:50=0A> Subject: = MIPS INTRNG changes=0A> =0A> Howdy -=0A> =0A> To support nested INTRNG inte= rrupt controllers on non-FDT MIPS targets, I've=0A> implemented a replaceme= nt for the cpu_establish_[hard|soft]intr() workaround=0A> introduced in r30= 5527 (D7692); I'll be commiting this in three days unless=0A> anyone object= s:=0A> =0A> https://reviews.freebsd.org/D12385=0A> =0A> Background:=0A> =0A= > Since non-FDT INTRNG targets do not have an equivalent to OFW_BUS_MAP_INT= R(),=0A> it is necessary for the MIPS nexus driver to implicitly establish = INTRNG=0A> interrupt mappings on behalf of child devices.=0A> =0A> The work= around introduced in r305527 implements this as follows, on non-FDT=0A> INT= RNG MIPS targets:=0A> =0A> - mips/nexus.c assumes that all bus interrupt re= quests are for a MIPS=0A> =A0 interrupt managed by mips/mips_pic.c=0A> - Ca= ll mips_pic's cpu_create_intr_map() from nexus_activate_resource() to=0A> = =A0 allocate a new interrupt mapping on-demand.=0A> - Call mips_pic's cpu_g= et_irq_resource() from nexus_setup_intr() to fetch a=0A> =A0 shared IRQ str= uct resource for the MIPS interrupt.=0A> =0A> In addition to assuming that = all IRQs are owned by mips_pic, on-demand IRQ=0A> mapping in the BUS_ACTIVA= TE_RESOURCE() path produces some unexpected behavior:=0A> =0A> - Any child = bus that uses bus_generic_rl_alloc_resource() or =0A> resource_list_alloc()= =0A> to implement BUS_ALLOC_RESOURCE() will update the child device's resou= rce=0A> list entry to reference the newly mapped IRQ -- but only if the res= ource is=0A> allocated with the RF_ACTIVE flag, resulting in BUS_ACTIVATE_R= ESOURCE() being=0A> called from BUS_ALLOC_RESOURCE() before the resource_li= st_entry update is=0A> performed.=0A> - BUS_ACTIVATE_RESOURCE() is itself n= ot resource_list-aware; if RF_ACTIVE is=0A> not set during allocation, and = bus_activate_resource() is instead called=0A> directly, the child's resourc= e list entry will _not_ updated to the newly=0A> mapped IRQ.=0A> =0A> Since= the resource_list_entry _may_ be updated to reference the IRQ mapping, =0A= > IRQs=0A> mappings implicitly created in nexus_activate_resource() cannot = be implicitly=0A> unmapped in nexus_deactivate_resource() and must be leake= d, as references to=0A> the mapping may remain in a child's resource_list_e= ntry.=0A> =0A> Rather than performing on-demand mapping during resource act= ivation, my changes=0A> preemptively produce (on non-FDT targets) a set of = IRQ mappings for all MIPS=0A> IRQs in nexus_attach(), using a fixed range o= f INTRNG IRQ assignments (0-7) that=0A> may be statically referenced by chi= ld devices.=0A> =0A> With D12385, the mips nexus behavior will now be:=0A> = =0A> - On non-FDT MIPS INTRNG targets, produce a set of fixed MIPS IRQ mapp= ings=0A> =A0 in nexus_attach() for the MIPS IRQ range.=0A> - On all MIPS IN= TRNG targets, call mips_pic_activate_intr() from=0A> =A0 nexus_activate_res= ource() to perform activation; this will either perform=0A> =A0 mips_pic-sp= ecific activation if the IRQ is found in mips_pic' table of=0A> =A0 MIPS IR= Q mappings, or will call intr_activate_irq() for IRQs not managed by=0A> = =A0 mips_pic (e.g. IRQs mapped by a child PIC).=0A> - On all MIPS INTRNG ta= rgets, call mips_pic_deactivate_intr() from=0A> =A0 nexus_deactivate_resour= ce(); this will either perform mips_pic-specific=0A> =A0 deactivation, or c= all intr_deactivate_irq() for IRQs not managed by=0A> =A0 mips_pic.=0A> =0A= > Cheers,=0A> Landon=0A> =0A> _____________________________________________= __=0A> freebsd-mips@freebsd.org mailing list=0A> https://lists.freebsd.org/= mailman/listinfo/freebsd-mips=0A> To unsubscribe, send any mail to =0A> "fr= eebsd-mips-unsubscribe@freebsd.org"=0A>