From nobody Tue Jul 21 17:15:58 2026 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4h4PDN0GFWz6mD01 for ; Tue, 21 Jul 2026 17:16:04 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "YR1" (not verified)) by mx1.freebsd.org (Postfix) with ESMTPS id 4h4PDM5Zn3z44Zv for ; Tue, 21 Jul 2026 17:16:03 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1784654163; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=Ok/5Yba5XynSgT+hmCn/6tBLg1f0+U15A6eD/og/4Kg=; b=nPt9Zwaa3ABhoG3kVgbm+f8SWy1RMiPqpXvlIt2q+UsW3jw+rTmrwh32bmZmCOCkc1tqm/ lHAAYh3WFBjyqK2mCtjHZKh+OUwXoxGmS2M9BE/U5Jp3TXZPBthdr7ETanzTKnE0uXp8qP 1CfG4medJu7pVUt8/LXJLyckQzRJE0DNgWVxyho5bIctE+lTbh+K+iVMlTSJxdYvSA2GdA uCwbIf/1TLUYnQm3+iPMyAJ+6WMgBjYJtX7rzavCwn93VnZOYsZ+XsrtLgKSUorBBuBtdB 5oXO2kDw6zBUouhh6W8+6seJpCqPIs8NivrscbVheGlhsTIEeYnLSoPl84h03g== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1784654163; a=rsa-sha256; cv=none; b=JDhce9L67ExjJLJawwyRu9HLIGVg74ou70NQJ85KInlrRBld3Z30bArkFZ/ncU0smb23BG v0gMXTxdfFRbi1vriea0V9d0glzb2t/lquhT6PtJ+DA1l5I0bioh2KPUtVRVfZuX+swk9K 3cQTP8ZNapoaL4ZKBB4XxWGUjh/HKMeh6ddt9pvf5pVUyeTUYGXhmUvNbF9UWevCJApVBy azucYRa/MqQGSQDmrwn21NO1yCqVSAIgwApQlNq/oXx7gv/PgZD6vzZPm+X1oxU7OSvZY3 z2KDafUbhCYBGgiSIKFVBbsO8h7ev+Ep3N1cpXkXe+nlqA6NN1+joBxoz7zXrQ== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1784654163; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=Ok/5Yba5XynSgT+hmCn/6tBLg1f0+U15A6eD/og/4Kg=; b=rtwr+OcE8K5nmnk4M11f24RzRX5j508QXWwB5YNlwQlccPzZc58N4vCHkNBdZkwtTaYivo OimbY+NskWOw80gZYq4kqF9mHTZu+uOQbSaP6w4ihayLk+r/YKokVpgLXCPArbHRaabzP9 y4R2SYqXNLo957r1p7TCkMxFMK8EIjmJOb1JWvKSdOdqfDwnj4k6V/LJ2xYm7uUGG2oCry F7Kqghapy1kHka78I7tTFnsnI0AtWObxFfB5t9D/1011Z9XUQjKOHBZCr7nROfmSpeT1TO VAaqqi2VaZs4XwSSpL9ECP3YM4sv0BgoWvF+y+ZKQNLPQ63IpoDFvaGpi/tG8A== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4h4PDM35bGzxkC for ; Tue, 21 Jul 2026 17:16:03 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 375a1 by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Tue, 21 Jul 2026 17:15:58 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Cc: Andre Silva From: Mitchell Horne Subject: git: 8c4d5701924f - main - hwpmc: Add EXTERROR diagnostics to the AMD and IBS allocators List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-all@freebsd.org Sender: owner-dev-commits-src-all@FreeBSD.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: mhorne X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 8c4d5701924f8401798265d2175f0b2bc704a222 Auto-Submitted: auto-generated Date: Tue, 21 Jul 2026 17:15:58 +0000 Message-Id: <6a5fa94e.375a1.2cb1a5f7@gitrepo.freebsd.org> The branch main has been updated by mhorne: URL: https://cgit.FreeBSD.org/src/commit/?id=8c4d5701924f8401798265d2175f0b2bc704a222 commit 8c4d5701924f8401798265d2175f0b2bc704a222 Author: Andre Silva AuthorDate: 2026-06-12 15:38:14 +0000 Commit: Mitchell Horne CommitDate: 2026-07-21 17:14:39 +0000 hwpmc: Add EXTERROR diagnostics to the AMD and IBS allocators Replace bare EINVAL in AMD/IBS allocation and config-validation with EXTERROR(), so a failed pmc(3) allocation names the check and value. Register HWPMC_AMD in exterr_cat.h and the generated filenames.h. Signed-off-by: Andre Silva Reviewed by: Ali Mashtizadeh , mhorne Sponsored by: AMD Pull Request: https://github.com/freebsd/freebsd-src/pull/2180 --- lib/libc/gen/exterr_cat_filenames.h | 1 + sys/dev/hwpmc/hwpmc_amd.c | 24 ++++++++++++++------ sys/dev/hwpmc/hwpmc_ibs.c | 45 +++++++++++++++++++++++-------------- sys/sys/exterr_cat.h | 2 +- 4 files changed, 47 insertions(+), 25 deletions(-) diff --git a/lib/libc/gen/exterr_cat_filenames.h b/lib/libc/gen/exterr_cat_filenames.h index 90e231879ccd..e098a94744f3 100644 --- a/lib/libc/gen/exterr_cat_filenames.h +++ b/lib/libc/gen/exterr_cat_filenames.h @@ -2,6 +2,7 @@ * Automatically @generated, use * tools/build/make_libc_exterr_cat_filenames.sh */ + [EXTERR_CAT_HWPMC_AMD] = "dev/hwpmc/hwpmc_amd.c", [EXTERR_CAT_HWPMC_IBS] = "dev/hwpmc/hwpmc_ibs.c", [EXTERR_CAT_VMM] = "dev/vmm/vmm_dev.c", [EXTERR_CAT_FUSE_DEVICE] = "fs/fuse/fuse_device.c", diff --git a/sys/dev/hwpmc/hwpmc_amd.c b/sys/dev/hwpmc/hwpmc_amd.c index b075837cd3e8..185ceff133b0 100644 --- a/sys/dev/hwpmc/hwpmc_amd.c +++ b/sys/dev/hwpmc/hwpmc_amd.c @@ -43,6 +43,9 @@ #include #include +#define EXTERR_CATEGORY EXTERR_CAT_HWPMC_AMD +#include + #include #include #include @@ -405,21 +408,24 @@ amd_allocate_pmc(int cpu __unused, int ri, struct pmc *pm, caps = pm->pm_caps; - if (((caps & PMC_CAP_PRECISE) != 0) && - ((pd->pd_caps & PMC_CAP_PRECISE) == 0)) - return (EINVAL); - PMCDBG2(MDP, ALL, 1,"amd-allocate ri=%d caps=0x%x", ri, caps); /* Validate sub-class. */ if (amd_pmcdesc[ri].pm_subclass != a->pm_md.pm_amd.pm_amd_sub_class) return (EINVAL); + if (((caps & PMC_CAP_PRECISE) != 0) && + ((pd->pd_caps & PMC_CAP_PRECISE) == 0)) + return (EINVAL); + if (strlen(pmc_cpuid) != 0) { config = a->pm_md.pm_amd.pm_amd_config; if ((config & ~amd_config_mask(amd_pmcdesc[ri].pm_subclass, caps)) != 0) - return (EINVAL); + return (EXTERROR(EINVAL, + "AMD PMU config has unsupported bits %#jx", + (uintmax_t)(config & ~amd_config_mask( + amd_pmcdesc[ri].pm_subclass, caps)))); pm->pm_md.pm_amd.pm_amd_evsel = config; PMCDBG2(MDP, ALL, 2, "amd-allocate ri=%d -> config=0x%jx", ri, (uintmax_t)config); @@ -443,11 +449,15 @@ amd_allocate_pmc(int cpu __unused, int ri, struct pmc *pm, } } if (i == amd_event_codes_size) - return (EINVAL); + return (EXTERROR(EINVAL, + "AMD legacy event %ju is not supported", + (uintmax_t)pe)); unitmask = a->pm_md.pm_amd.pm_amd_config & AMD_PMC_UNITMASK; if ((unitmask & ~allowed_unitmask) != 0) /* disallow reserved bits */ - return (EINVAL); + return (EXTERROR(EINVAL, + "AMD unitmask %#jx exceeds allowed mask %#jx", + (uintmax_t)unitmask, (uintmax_t)allowed_unitmask)); if (unitmask && (caps & PMC_CAP_QUALIFIER) != 0) config |= unitmask; diff --git a/sys/dev/hwpmc/hwpmc_ibs.c b/sys/dev/hwpmc/hwpmc_ibs.c index 16bc5edd5019..ce9e038e5d0b 100644 --- a/sys/dev/hwpmc/hwpmc_ibs.c +++ b/sys/dev/hwpmc/hwpmc_ibs.c @@ -147,9 +147,14 @@ ibs_init_policy(void) static int ibs_validate_fetch_config(uint64_t config) { + uint64_t allowed_mask; - if ((config & ~(ibs_fetch_allowed_mask | ibs_fetch_extra_mask)) != 0) - return (EINVAL); + allowed_mask = ibs_fetch_allowed_mask | ibs_fetch_extra_mask; + if ((config & ~allowed_mask) != 0) { + return (EXTERROR(EINVAL, + "IBS fetch ctl config 0x%jx has bits outside allowed mask" + " 0x%jx", (uintmax_t)config, (uintmax_t)allowed_mask)); + } return (0); } @@ -163,22 +168,27 @@ ibs_validate_op_config(uint64_t config) if ((config & IBS_OP_CTL_LATFLTEN) != 0) { if ((ibs_features & CPUID_IBSID_IBSLOADLATENCYFILT) == 0) - return (EINVAL); + return (EXTERROR(EINVAL, + "IBS op load-latency filter is not supported")); /* * Zen 6 decouples L3MISSONLY from load-latency filtering * (AMD pub 69205); enforce the pairing only on older parts. */ if ((ibs_features & CPUID_IBSID_IBSDIS) == 0 && (config & IBS_OP_CTL_L3MISSONLY) == 0) - return (EINVAL); + return (EXTERROR(EINVAL, + "IBS op load-latency filter requires l3miss")); allowed_mask |= IBS_OP_CTL_LDLATMASK | IBS_OP_CTL_L3MISSONLY; } allowed_mask |= ibs_op_extra_mask; - if ((config & ~allowed_mask) != 0) - return (EINVAL); + if ((config & ~allowed_mask) != 0) { + return (EXTERROR(EINVAL, + "IBS op ctl config 0x%jx has bits outside allowed mask" + " 0x%jx", (uintmax_t)config, (uintmax_t)allowed_mask)); + } return (0); } @@ -197,10 +207,11 @@ ibs_validate_fetch_ctl2_config(uint64_t config) allowed_mask = ibs_fetch_ctl2_allowed_mask | ibs_fetch_ctl2_extra_mask; - if ((config & ~allowed_mask) != 0) + if ((config & ~allowed_mask) != 0) { return (EXTERROR(EINVAL, "IBS fetch ctl2 config 0x%jx has bits outside allowed" - " mask 0x%jx", (uint64_t)config, (uint64_t)allowed_mask)); + " mask 0x%jx", (uintmax_t)config, (uintmax_t)allowed_mask)); + } return (0); } @@ -219,10 +230,11 @@ ibs_validate_op_ctl2_config(uint64_t config) allowed_mask = ibs_op_ctl2_allowed_mask | ibs_op_ctl2_extra_mask; - if ((config & ~allowed_mask) != 0) + if ((config & ~allowed_mask) != 0) { return (EXTERROR(EINVAL, "IBS op ctl2 config 0x%jx has bits outside allowed mask" - " 0x%jx", (uint64_t)config, (uint64_t)allowed_mask)); + " 0x%jx", (uintmax_t)config, (uintmax_t)allowed_mask)); + } return (0); } @@ -244,7 +256,8 @@ ibs_validate_pmc_config(int ri, uint64_t config, uint64_t config2) return (error); return (ibs_validate_op_ctl2_config(config2)); default: - return (EXTERROR(EINVAL, "invalid IBS PMC index %d", ri)); + return (EXTERROR(EINVAL, "Unsupported IBS PMC type %ju", + (uintmax_t)ri)); } } @@ -364,13 +377,11 @@ ibs_allocate_pmc(int cpu __unused, int ri, struct pmc *pm, KASSERT(ri >= 0 && ri < IBS_NPMCS, ("[ibs,%d] illegal row index %d", __LINE__, ri)); - /* check class match */ + /* Row discriminators; the allocation loop probes every row. */ if (a->pm_class != PMC_CLASS_IBS) - return (EXTERROR(EINVAL, "PMC class is not IBS")); + return (EINVAL); if (a->pm_md.pm_ibs.ibs_type != ri) - return (EXTERROR(EINVAL, - "IBS type %ju does not match PMC index %ju", - (uint64_t)a->pm_md.pm_ibs.ibs_type, (uint64_t)ri)); + return (EINVAL); caps = pm->pm_caps; @@ -390,7 +401,7 @@ ibs_allocate_pmc(int cpu __unused, int ri, struct pmc *pm, } if (!PMC_IS_SAMPLING_MODE(a->pm_mode)) - return (EINVAL); + return (EXTERROR(EINVAL, "IBS only supports sampling mode")); config = a->pm_md.pm_ibs.ibs_ctl; config2 = a->pm_md.pm_ibs.ibs_ctl2; diff --git a/sys/sys/exterr_cat.h b/sys/sys/exterr_cat.h index 1c3f894e8aff..e63d118d7eb7 100644 --- a/sys/sys/exterr_cat.h +++ b/sys/sys/exterr_cat.h @@ -42,6 +42,6 @@ #define EXTERR_CAT_VMM 17 #define EXTERR_CAT_HWPMC_IBS 18 #define EXTERR_CAT_LINKER 19 +#define EXTERR_CAT_HWPMC_AMD 20 #endif -