From owner-cvs-src-old@FreeBSD.ORG Mon Jul 26 18:23:27 2010 Return-Path: Delivered-To: cvs-src-old@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id E185A1065680 for ; Mon, 26 Jul 2010 18:23:27 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id CD6E58FC14 for ; Mon, 26 Jul 2010 18:23:27 +0000 (UTC) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.4/8.14.4) with ESMTP id o6QINRVC091031 for ; Mon, 26 Jul 2010 18:23:27 GMT (envelope-from jhb@repoman.freebsd.org) Received: (from svn2cvs@localhost) by repoman.freebsd.org (8.14.4/8.14.4/Submit) id o6QINReO091030 for cvs-src-old@freebsd.org; Mon, 26 Jul 2010 18:23:27 GMT (envelope-from jhb@repoman.freebsd.org) Message-Id: <201007261823.o6QINReO091030@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: svn2cvs set sender to jhb@repoman.freebsd.org using -f From: John Baldwin Date: Mon, 26 Jul 2010 18:22:46 +0000 (UTC) To: cvs-src-old@freebsd.org X-FreeBSD-CVS-Branch: RELENG_8 Subject: cvs commit: src/sys/amd64/acpica acpi_wakeup.c src/sys/amd64/amd64 mca.c mp_machdep.c src/sys/amd64/include mca.h src/sys/i386/acpica acpi_wakeup.c src/sys/i386/i386 mca.c src/sys/i386/include mca.h X-BeenThere: cvs-src-old@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: **OBSOLETE** CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 26 Jul 2010 18:23:28 -0000 jhb 2010-07-26 18:22:46 UTC FreeBSD src repository Modified files: (Branch: RELENG_8) sys/amd64/acpica acpi_wakeup.c sys/amd64/amd64 mca.c mp_machdep.c sys/amd64/include mca.h sys/i386/acpica acpi_wakeup.c sys/i386/i386 mca.c sys/i386/include mca.h Log: SVN rev 210509 on 2010-07-26 18:22:46Z by jhb MFC 209212: Restore the machine check register banks on resume. For banks being monitored via CMCI, reset the interrupt threshold to 1 on resume. Revision Changes Path 1.26.2.2 +2 -0 src/sys/amd64/acpica/acpi_wakeup.c 1.3.2.8 +66 -19 src/sys/amd64/amd64/mca.c 1.309.2.3 +1 -0 src/sys/amd64/amd64/mp_machdep.c 1.1.2.5 +1 -0 src/sys/amd64/include/mca.h 1.50.2.2 +2 -0 src/sys/i386/acpica/acpi_wakeup.c 1.3.2.8 +66 -19 src/sys/i386/i386/mca.c 1.1.2.5 +1 -0 src/sys/i386/include/mca.h