From owner-cvs-src-old@FreeBSD.ORG Mon Apr 19 06:02:09 2010 Return-Path: Delivered-To: cvs-src-old@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id D1DC110657AF for ; Mon, 19 Apr 2010 06:02:09 +0000 (UTC) (envelope-from jmallett@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 9BD788FC14 for ; Mon, 19 Apr 2010 06:02:05 +0000 (UTC) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.3/8.14.3) with ESMTP id o3J625Lv060701 for ; Mon, 19 Apr 2010 06:02:05 GMT (envelope-from jmallett@repoman.freebsd.org) Received: (from svn2cvs@localhost) by repoman.freebsd.org (8.14.3/8.14.3/Submit) id o3J625Sl060700 for cvs-src-old@freebsd.org; Mon, 19 Apr 2010 06:02:05 GMT (envelope-from jmallett@repoman.freebsd.org) Message-Id: <201004190602.o3J625Sl060700@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: svn2cvs set sender to jmallett@repoman.freebsd.org using -f From: Juli Mallett Date: Mon, 19 Apr 2010 06:01:58 +0000 (UTC) To: cvs-src-old@freebsd.org X-FreeBSD-CVS-Branch: HEAD Subject: cvs commit: src/sys/mips/cavium octeon_machdep.c octeon_mp.c src/sys/mips/include cpufunc.h cpuregs.h src/sys/mips/mips genassym.c X-BeenThere: cvs-src-old@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: **OBSOLETE** CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 19 Apr 2010 06:02:09 -0000 jmallett 2010-04-19 06:01:58 UTC FreeBSD src repository Modified files: sys/mips/cavium octeon_machdep.c octeon_mp.c sys/mips/include cpufunc.h cpuregs.h sys/mips/mips genassym.c Log: SVN rev 206829 on 2010-04-19 06:01:58Z by jmallett o) Fix XKPHYS physical address extraction. Also define cache coherency attributes for XKPHYS. o) Make coprocessor 0 accessor function macros for register+selector registers take the full name so that e.g. (as done in this commit), prid selector 1 can be written through mips_wr_ebase() rather than mips_wr_prid1(). o) Allow for sign extension of 32-bit segment addresses. o) Remove an unused MIPS-I register number. Revision Changes Path 1.16 +0 -10 src/sys/mips/cavium/octeon_machdep.c 1.2 +1 -1 src/sys/mips/cavium/octeon_mp.c 1.6 +17 -17 src/sys/mips/include/cpufunc.h 1.6 +25 -15 src/sys/mips/include/cpuregs.h 1.7 +6 -0 src/sys/mips/mips/genassym.c