From owner-svn-src-head@freebsd.org Sat Sep 9 19:19:15 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 4AB5EE03B26; Sat, 9 Sep 2017 19:19:15 +0000 (UTC) (envelope-from sbruno@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 1909774986; Sat, 9 Sep 2017 19:19:15 +0000 (UTC) (envelope-from sbruno@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v89JJE4Z075011; Sat, 9 Sep 2017 19:19:14 GMT (envelope-from sbruno@FreeBSD.org) Received: (from sbruno@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v89JJE8Z075009; Sat, 9 Sep 2017 19:19:14 GMT (envelope-from sbruno@FreeBSD.org) Message-Id: <201709091919.v89JJE8Z075009@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: sbruno set sender to sbruno@FreeBSD.org using -f From: Sean Bruno Date: Sat, 9 Sep 2017 19:19:14 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r323371 - head/sys/conf X-SVN-Group: head X-SVN-Commit-Author: sbruno X-SVN-Commit-Paths: head/sys/conf X-SVN-Commit-Revision: 323371 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 09 Sep 2017 19:19:15 -0000 Author: sbruno Date: Sat Sep 9 19:19:13 2017 New Revision: 323371 URL: https://svnweb.freebsd.org/changeset/base/323371 Log: r323359 instroduced an ARMv8 only uart(4) device to the tree but placed the driver in a place where it will be built for all targets. x86 doesn't have all the required build bits for this device. Move the uart(4) device mvebu to arm64 only. Modified: head/sys/conf/files head/sys/conf/files.arm64 Modified: head/sys/conf/files ============================================================================== --- head/sys/conf/files Sat Sep 9 18:39:55 2017 (r323370) +++ head/sys/conf/files Sat Sep 9 19:19:13 2017 (r323371) @@ -3053,7 +3053,6 @@ dev/uart/uart_bus_puc.c optional uart puc dev/uart/uart_bus_scc.c optional uart scc dev/uart/uart_core.c optional uart dev/uart/uart_dbg.c optional uart gdb -dev/uart/uart_dev_mvebu.c optional uart uart_mvebu dev/uart/uart_dev_ns8250.c optional uart uart_ns8250 | uart uart_snps dev/uart/uart_dev_pl011.c optional uart pl011 dev/uart/uart_dev_quicc.c optional uart quicc Modified: head/sys/conf/files.arm64 ============================================================================== --- head/sys/conf/files.arm64 Sat Sep 9 18:39:55 2017 (r323370) +++ head/sys/conf/files.arm64 Sat Sep 9 19:19:13 2017 (r323371) @@ -176,6 +176,7 @@ dev/pci/pci_host_generic_fdt.c optional pci fdt dev/psci/psci.c optional psci dev/psci/psci_arm64.S optional psci dev/uart/uart_cpu_arm64.c optional uart +dev/uart/uart_dev_mvebu.c optional uart uart_mvebu dev/uart/uart_dev_pl011.c optional uart pl011 dev/usb/controller/dwc_otg_hisi.c optional dwcotg fdt soc_hisi_hi6220 dev/usb/controller/ehci_mv.c optional ehci_mv fdt