Date: Mon, 15 Feb 1999 02:44:18 -0500 (EST) From: "John S. Dyson" <dyson@iquest.net> To: dillon@apollo.backplane.com (Matthew Dillon) Cc: mjacob@feral.com, mrcpu@internetcds.com, hackers@FreeBSD.ORG Subject: Re: Processor affinity? Message-ID: <199902150744.CAA00356@y.dyson.net> In-Reply-To: <199902150650.WAA12919@apollo.backplane.com> from Matthew Dillon at "Feb 14, 99 10:50:02 pm"
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Matthew Dillon said: > > : > : > :Really? Hmm.. I would have thought for a machine that with local cache > :but expensive global access (e.g., sun4d architecture) that affinity is a > :win. Oh well, not my area of expertise. > > All modern SMP designs have per-cpu caches and nearly all have local > L1 and L2 caches ( because the L2 caches are what tie into the SMP > mechanisms of the backplane ). The expense of a main memory access > verses a cache access is always pretty big. > > There are various kinds of SMP caching schemes, but most of the amount > to the same generalities and only differ in their basic performance > characteristic. For example, a number of modern SMP designs use an > L2-read-shared and L2-write-allocate scheme and one L2 cache that misses > is actually able to get the data from another L2 cache belonging to > another cpu rather then have to go to main memory. > > The only issue with processor affinity, really, is the actual load on > the main memory. Processor affinity only makes sense when the load on > main memory is relatively high. Typically, SMP systems have a relatively > low main memory load ( and high L1 and L2 cache memory load ), so until > you have enough cpu's banging on the same main memory to saturate it, > processor affinity is usually wash. It makes sense on a big 32+ cpu > Solaris or SGI system, but not much sense on a 2 or 4 cpu system. > It actually does make sense on a 2 or 4 cpu system. The problem with performance associated with machines without a loaded memory bus isn't bandwidth, but is latency. On a 2 or 4 cpu system, the affinity should decay rapidly on # of active CPU cycles. I do have affinity code for SMP, and it makes a positive difference in performance, even with the big-lock FreeBSD kernel. The reason for diminishing gains on a 2 or 4 cpu system isn't bandwidth as much as it is the availability of fewer CPUs to choose from. By blindly choosing the wrong cpu, there will be much more latency assocated with refilling the cache on context switch. -- John | Never try to teach a pig to sing, dyson@iquest.net | it makes one look stupid jdyson@nc.com | and it irritates the pig. To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hackers" in the body of the message
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