From owner-svn-src-head@FreeBSD.ORG Sat May 28 19:14:16 2011 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 94134106566B; Sat, 28 May 2011 19:14:16 +0000 (UTC) (envelope-from marcel@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 6B23A8FC14; Sat, 28 May 2011 19:14:16 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id p4SJEGd8097165; Sat, 28 May 2011 19:14:16 GMT (envelope-from marcel@svn.freebsd.org) Received: (from marcel@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id p4SJEG0s097163; Sat, 28 May 2011 19:14:16 GMT (envelope-from marcel@svn.freebsd.org) Message-Id: <201105281914.p4SJEG0s097163@svn.freebsd.org> From: Marcel Moolenaar Date: Sat, 28 May 2011 19:14:16 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r222428 - head/sys/powerpc/mpc85xx X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 28 May 2011 19:14:16 -0000 Author: marcel Date: Sat May 28 19:14:16 2011 New Revision: 222428 URL: http://svn.freebsd.org/changeset/base/222428 Log: o Determine the number of LAWs in a way the is future proof. Only the MPC8555(E) has 8 LAWs, so don't make that the default case. Current processors have 12 LAWs so use that as the default instead. o Determine the target ID of the PCI/PCI-X and PCI-E controllers in a way that's more future proof. There's almost a perfect mapping from HC register offset to target ID, so use that as the default. Handle the MPC8548(E) specially, since it has a non-standard target ID for the PCI-E controller. Don't worry about whether the processor implements the target ID here, because we should not get called for PCI/PCI-X or PCI-E host controllers that don't exist. Modified: head/sys/powerpc/mpc85xx/mpc85xx.c Modified: head/sys/powerpc/mpc85xx/mpc85xx.c ============================================================================== --- head/sys/powerpc/mpc85xx/mpc85xx.c Sat May 28 17:13:15 2011 (r222427) +++ head/sys/powerpc/mpc85xx/mpc85xx.c Sat May 28 19:14:16 2011 (r222428) @@ -69,12 +69,13 @@ law_getmax(void) uint32_t ver; ver = SVR_VER(mfspr(SPR_SVR)); - if (ver == SVR_MPC8572E || ver == SVR_MPC8572) - return (12); - else if (ver == SVR_MPC8548E || ver == SVR_MPC8548) - return (10); - else + if (ver == SVR_MPC8555E || ver == SVR_MPC8555) return (8); + if (ver == SVR_MPC8548E || ver == SVR_MPC8548 || + ver == SVR_MPC8533E || ver == SVR_MPC8533) + return (10); + + return (12); } #define _LAW_SR(trgt,size) (0x80000000 | (trgt << 20) | (ffsl(size) - 2)) @@ -152,10 +153,16 @@ law_pci_target(struct resource *res, int trgt = 1; break; case 0xa000: - if (ver == SVR_MPC8572E || ver == SVR_MPC8572) - trgt = 2; + if (ver == SVR_MPC8548E || ver == SVR_MPC8548) + trgt = 3; else + trgt = 2; + break; + case 0xb000: + if (ver == SVR_MPC8548E || ver == SVR_MPC8548) rv = EINVAL; + else + trgt = 3; break; default: rv = ENXIO;