Skip site navigation (1)Skip section navigation (2)
Date:      Mon, 17 Jun 2013 20:26:19 +0000 (UTC)
From:      Scott Long <scottl@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-9@freebsd.org
Subject:   svn commit: r251866 - stable/9/sys/arm/arm
Message-ID:  <201306172026.r5HKQJpJ029063@svn.freebsd.org>

next in thread | raw e-mail | index | archive | help
Author: scottl
Date: Mon Jun 17 20:26:19 2013
New Revision: 251866
URL: http://svnweb.freebsd.org/changeset/base/251866

Log:
  MFC r236991:
  
  Final whitespace trim.
  
  Submitted by:	imp
  Approved by:	marius
  Obtained from:	Netflix

Modified:
  stable/9/sys/arm/arm/bcopyinout_xscale.S
  stable/9/sys/arm/arm/bootconfig.c
  stable/9/sys/arm/arm/busdma_machdep.c
  stable/9/sys/arm/arm/cpufunc.c
  stable/9/sys/arm/arm/cpufunc_asm.S
  stable/9/sys/arm/arm/cpufunc_asm_arm10.S
  stable/9/sys/arm/arm/cpufunc_asm_arm11.S
  stable/9/sys/arm/arm/cpufunc_asm_arm7tdmi.S
  stable/9/sys/arm/arm/cpufunc_asm_arm8.S
  stable/9/sys/arm/arm/cpufunc_asm_arm9.S
  stable/9/sys/arm/arm/cpufunc_asm_armv4.S
  stable/9/sys/arm/arm/cpufunc_asm_armv5.S
  stable/9/sys/arm/arm/cpufunc_asm_sa1.S
  stable/9/sys/arm/arm/cpufunc_asm_xscale.S
  stable/9/sys/arm/arm/cpufunc_asm_xscale_c3.S
  stable/9/sys/arm/arm/db_disasm.c
  stable/9/sys/arm/arm/db_interface.c
  stable/9/sys/arm/arm/db_trace.c
  stable/9/sys/arm/arm/disassem.c
  stable/9/sys/arm/arm/dump_machdep.c
  stable/9/sys/arm/arm/elf_trampoline.c
  stable/9/sys/arm/arm/exception.S
  stable/9/sys/arm/arm/gdb_machdep.c
  stable/9/sys/arm/arm/in_cksum.c
  stable/9/sys/arm/arm/intr.c
  stable/9/sys/arm/arm/irq_dispatch.S
  stable/9/sys/arm/arm/machdep.c
  stable/9/sys/arm/arm/mem.c
  stable/9/sys/arm/arm/nexus.c
  stable/9/sys/arm/arm/pmap.c
  stable/9/sys/arm/arm/support.S
  stable/9/sys/arm/arm/swtch.S
  stable/9/sys/arm/arm/sys_machdep.c
  stable/9/sys/arm/arm/trap.c
  stable/9/sys/arm/arm/undefined.c
  stable/9/sys/arm/arm/vectors.S
  stable/9/sys/arm/arm/vm_machdep.c
Directory Properties:
  stable/9/sys/   (props changed)

Modified: stable/9/sys/arm/arm/bcopyinout_xscale.S
==============================================================================
--- stable/9/sys/arm/arm/bcopyinout_xscale.S	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/bcopyinout_xscale.S	Mon Jun 17 20:26:19 2013	(r251866)
@@ -333,10 +333,10 @@ ENTRY(copyin)
 	str	r6, [r1], #0x04
 	str	r7, [r1], #0x04
 .Lcopyin_bad1:
-	subs	r2, r2, #0x10         
+	subs	r2, r2, #0x10
 	bge	.Lcopyin_bad1_loop16
 
-	adds	r2, r2, #0x10         
+	adds	r2, r2, #0x10
 	ldmeqfd	sp!, {r4-r7}
 	RETeq				/* Return now if done */
 	subs	r2, r2, #0x04
@@ -394,10 +394,10 @@ ENTRY(copyin)
 	str	r6, [r1], #0x04
 	str	r7, [r1], #0x04
 .Lcopyin_bad2:
-	subs	r2, r2, #0x10         
+	subs	r2, r2, #0x10
 	bge	.Lcopyin_bad2_loop16
 
-	adds	r2, r2, #0x10         
+	adds	r2, r2, #0x10
 	ldmeqfd	sp!, {r4-r7}
 	RETeq				/* Return now if done */
 	subs	r2, r2, #0x04
@@ -455,10 +455,10 @@ ENTRY(copyin)
 	str	r6, [r1], #0x04
 	str	r7, [r1], #0x04
 .Lcopyin_bad3:
-	subs	r2, r2, #0x10         
+	subs	r2, r2, #0x10
 	bge	.Lcopyin_bad3_loop16
 
-	adds	r2, r2, #0x10         
+	adds	r2, r2, #0x10
 	ldmeqfd	sp!, {r4-r7}
 	RETeq				/* Return now if done */
 	subs	r2, r2, #0x04
@@ -785,10 +785,10 @@ ENTRY(copyout)
 	strt	r6, [r1], #0x04
 	strt	r7, [r1], #0x04
 .Lcopyout_bad1:
-	subs	r2, r2, #0x10         
+	subs	r2, r2, #0x10
 	bge	.Lcopyout_bad1_loop16
 
-	adds	r2, r2, #0x10         
+	adds	r2, r2, #0x10
 	ldmeqfd	sp!, {r4-r7}
 	RETeq				/* Return now if done */
 	subs	r2, r2, #0x04
@@ -846,10 +846,10 @@ ENTRY(copyout)
 	strt	r6, [r1], #0x04
 	strt	r7, [r1], #0x04
 .Lcopyout_bad2:
-	subs	r2, r2, #0x10         
+	subs	r2, r2, #0x10
 	bge	.Lcopyout_bad2_loop16
 
-	adds	r2, r2, #0x10         
+	adds	r2, r2, #0x10
 	ldmeqfd	sp!, {r4-r7}
 	RETeq				/* Return now if done */
 	subs	r2, r2, #0x04
@@ -907,10 +907,10 @@ ENTRY(copyout)
 	strt	r6, [r1], #0x04
 	strt	r7, [r1], #0x04
 .Lcopyout_bad3:
-	subs	r2, r2, #0x10         
+	subs	r2, r2, #0x10
 	bge	.Lcopyout_bad3_loop16
 
-	adds	r2, r2, #0x10         
+	adds	r2, r2, #0x10
 	ldmeqfd	sp!, {r4-r7}
 	RETeq				/* Return now if done */
 	subs	r2, r2, #0x04

Modified: stable/9/sys/arm/arm/bootconfig.c
==============================================================================
--- stable/9/sys/arm/arm/bootconfig.c	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/bootconfig.c	Mon Jun 17 20:26:19 2013	(r251866)
@@ -46,7 +46,7 @@ __FBSDID("$FreeBSD$");
 #include <machine/bootconfig.h>
 
 
-/* 
+/*
  * Function to identify and process different types of boot argument
  */
 

Modified: stable/9/sys/arm/arm/busdma_machdep.c
==============================================================================
--- stable/9/sys/arm/arm/busdma_machdep.c	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/busdma_machdep.c	Mon Jun 17 20:26:19 2013	(r251866)
@@ -156,7 +156,7 @@ struct bus_dmamap {
 static STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist;
 static STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist;
 
-static TAILQ_HEAD(,bus_dmamap) dmamap_freelist = 
+static TAILQ_HEAD(,bus_dmamap) dmamap_freelist =
 	TAILQ_HEAD_INITIALIZER(dmamap_freelist);
 
 #define BUSDMA_STATIC_MAPS	500
@@ -210,7 +210,7 @@ arm_dmamap_freelist_init(void *dummy)
 {
 	int i;
 
-	for (i = 0; i < BUSDMA_STATIC_MAPS; i++) 
+	for (i = 0; i < BUSDMA_STATIC_MAPS; i++)
 		TAILQ_INSERT_HEAD(&dmamap_freelist, &map_pool[i], freelist);
 }
 
@@ -231,7 +231,7 @@ _bus_dma_can_bounce(vm_offset_t lowaddr,
 	int i;
 	for (i = 0; phys_avail[i] && phys_avail[i + 1]; i += 2) {
 		if ((lowaddr >= phys_avail[i] && lowaddr <= phys_avail[i + 1])
-		    || (lowaddr < phys_avail[i] && 
+		    || (lowaddr < phys_avail[i] &&
 		    highaddr > phys_avail[i]))
 			return (1);
 	}
@@ -313,7 +313,7 @@ _busdma_alloc_dmamap(void)
 	return (map);
 }
 
-static __inline void 
+static __inline void
 _busdma_free_dmamap(bus_dmamap_t map)
 {
 	if (map->flags & DMAMAP_ALLOCATED)
@@ -633,7 +633,7 @@ bus_dmamem_alloc(bus_dma_tag_t dmat, voi
 			*vaddr = tmpaddr;
 		} else
 			newmap->origbuffer = newmap->allocbuffer = NULL;
-	} else 
+	} else
 		newmap->origbuffer = newmap->allocbuffer = NULL;
         return (0);
 }
@@ -844,7 +844,7 @@ bus_dmamap_load_buffer(bus_dma_tag_t dma
 		if (seg >= 0 && curaddr == lastaddr &&
 		    (segs[seg].ds_len + sgsize) <= dmat->maxsegsz &&
 		    (dmat->boundary == 0 ||
-		     (segs[seg].ds_addr & bmask) == 
+		     (segs[seg].ds_addr & bmask) ==
 		     (curaddr & bmask))) {
 			segs[seg].ds_len += sgsize;
 			goto segdone;
@@ -941,7 +941,7 @@ bus_dmamap_load_mbuf(bus_dma_tag_t dmat,
 		for (m = m0; m != NULL && error == 0; m = m->m_next) {
 			if (m->m_len > 0) {
 				error = bus_dmamap_load_buffer(dmat,
-				    dm_segments, map, m->m_data, m->m_len, 
+				    dm_segments, map, m->m_data, m->m_len,
 				    pmap_kernel(), flags, &lastaddr, &nsegs);
 				map->len += m->m_len;
 			}
@@ -951,7 +951,7 @@ bus_dmamap_load_mbuf(bus_dma_tag_t dmat,
 	}
 
 	if (error) {
-		/* 
+		/*
 		 * force "no valid mappings" on error in callback.
 		 */
 		(*callback)(callback_arg, dm_segments, 0, 0, error);
@@ -1057,7 +1057,7 @@ bus_dmamap_load_uio(bus_dma_tag_t dmat, 
 	}
 
 	if (error) {
-		/* 
+		/*
 		 * force "no valid mappings" on error in callback.
 		 */
 		(*callback)(callback_arg, dm_segments, 0, 0, error);
@@ -1092,7 +1092,7 @@ bus_dmamap_sync_buf(void *buf, int len, 
 {
 	char _tmp_cl[arm_dcache_align], _tmp_clend[arm_dcache_align];
 	register_t s;
-	int partial; 
+	int partial;
 
 	if ((op & BUS_DMASYNC_PREWRITE) && !(op & BUS_DMASYNC_PREREAD)) {
 		cpu_dcache_wb_range((vm_offset_t)buf, len);
@@ -1116,7 +1116,7 @@ bus_dmamap_sync_buf(void *buf, int len, 
 				    ~arm_dcache_align_mask),
 				    (vm_offset_t)buf & arm_dcache_align_mask);
 			if (((vm_offset_t)buf + len) & arm_dcache_align_mask)
-				memcpy(_tmp_clend, 
+				memcpy(_tmp_clend,
 				    (void *)((vm_offset_t)buf + len),
 				    arm_dcache_align - (((vm_offset_t)(buf) +
 				    len) & arm_dcache_align_mask));
@@ -1126,11 +1126,11 @@ bus_dmamap_sync_buf(void *buf, int len, 
 		if (partial) {
 			if ((vm_offset_t)buf & arm_dcache_align_mask)
 				memcpy((void *)((vm_offset_t)buf &
-				    ~arm_dcache_align_mask), _tmp_cl, 
+				    ~arm_dcache_align_mask), _tmp_cl,
 				    (vm_offset_t)buf & arm_dcache_align_mask);
 			if (((vm_offset_t)buf + len) & arm_dcache_align_mask)
-				memcpy((void *)((vm_offset_t)buf + len), 
-				    _tmp_clend, arm_dcache_align - 
+				memcpy((void *)((vm_offset_t)buf + len),
+				    _tmp_clend, arm_dcache_align -
 				    (((vm_offset_t)(buf) + len) &
 				    arm_dcache_align_mask));
 			intr_restore(s);
@@ -1146,7 +1146,7 @@ _bus_dmamap_sync_bp(bus_dma_tag_t dmat, 
 	STAILQ_FOREACH(bpage, &map->bpages, links) {
 		if (op & BUS_DMASYNC_PREWRITE) {
 			bcopy((void *)bpage->datavaddr,
-			    (void *)(bpage->vaddr_nocache != 0 ? 
+			    (void *)(bpage->vaddr_nocache != 0 ?
 				     bpage->vaddr_nocache : bpage->vaddr),
 			    bpage->datacount);
 			if (bpage->vaddr_nocache == 0) {
@@ -1164,7 +1164,7 @@ _bus_dmamap_sync_bp(bus_dma_tag_t dmat, 
 				cpu_l2cache_inv_range(bpage->vaddr,
 				    bpage->datacount);
 			}
-			bcopy((void *)(bpage->vaddr_nocache != 0 ? 
+			bcopy((void *)(bpage->vaddr_nocache != 0 ?
 	       		    bpage->vaddr_nocache : bpage->vaddr),
 			    (void *)bpage->datavaddr, bpage->datacount);
 			dmat->bounce_zone->total_bounced++;
@@ -1179,7 +1179,7 @@ _bus_dma_buf_is_in_bp(bus_dmamap_t map, 
 
 	STAILQ_FOREACH(bpage, &map->bpages, links) {
 		if ((vm_offset_t)buf >= bpage->datavaddr &&
-		    (vm_offset_t)buf + len <= bpage->datavaddr + 
+		    (vm_offset_t)buf + len <= bpage->datavaddr +
 		    bpage->datacount)
 			return (1);
 	}

Modified: stable/9/sys/arm/arm/cpufunc.c
==============================================================================
--- stable/9/sys/arm/arm/cpufunc.c	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/cpufunc.c	Mon Jun 17 20:26:19 2013	(r251866)
@@ -222,7 +222,7 @@ struct cpu_functions arm8_cpufuncs = {
 	arm8_context_switch,		/* context_switch	*/
 
 	arm8_setup			/* cpu setup		*/
-};          
+};
 #endif	/* CPU_ARM8 */
 
 #ifdef CPU_ARM9
@@ -328,7 +328,7 @@ struct cpu_functions armv5_ec_cpufuncs =
 	(void *)cpufunc_nullop,         /* l2cache_wbinv_range  */
       	(void *)cpufunc_nullop,         /* l2cache_inv_range    */
 	(void *)cpufunc_nullop,         /* l2cache_wb_range     */
-				 
+
 	/* Other functions */
 
 	cpufunc_nullop,			/* flush_prefetchbuf	*/
@@ -530,7 +530,7 @@ struct cpu_functions sa110_cpufuncs = {
 	sa110_context_switch,		/* context_switch	*/
 
 	sa110_setup			/* cpu setup		*/
-};          
+};
 #endif	/* CPU_SA110 */
 
 #if defined(CPU_SA1100) || defined(CPU_SA1110)
@@ -591,7 +591,7 @@ struct cpu_functions sa11x0_cpufuncs = {
 	sa11x0_context_switch,		/* context_switch	*/
 
 	sa11x0_setup			/* cpu setup		*/
-};          
+};
 #endif	/* CPU_SA1100 || CPU_SA1110 */
 
 #ifdef CPU_IXP12X0
@@ -652,7 +652,7 @@ struct cpu_functions ixp12x0_cpufuncs = 
 	ixp12x0_context_switch,		/* context_switch	*/
 
 	ixp12x0_setup			/* cpu setup		*/
-};          
+};
 #endif	/* CPU_IXP12X0 */
 
 #if defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
@@ -841,7 +841,7 @@ struct cpu_functions fa526_cpufuncs = {
 	fa526_context_switch,		/* context_switch	*/
 
 	fa526_setup			/* cpu setup 		*/
-};          
+};
 #endif	/* CPU_FA526 || CPU_FA626TE */
 
 
@@ -1099,7 +1099,7 @@ set_cpufuncs()
 		cpu_reset_needs_v4_MMU_disable = 1;	/* V4 or higher */
 		get_cachetype_cp15();
 		arm10_dcache_sets_inc = 1U << arm_dcache_l2_linesize;
-		arm10_dcache_sets_max = 
+		arm10_dcache_sets_max =
 		    (1U << (arm_dcache_l2_linesize + arm_dcache_l2_nsets)) -
 		    arm10_dcache_sets_inc;
 		arm10_dcache_index_inc = 1U << (32 - arm_dcache_l2_assoc);
@@ -1353,7 +1353,7 @@ early_abort_fixup(arg)
 		int loop;
 		int count;
 		int *registers = &frame->tf_r0;
-        
+
 		DFC_PRINTF(("LDM/STM\n"));
 		DFC_DISASSEMBLE(fault_pc);
 		if (fault_instruction & (1 << 21)) {
@@ -1533,7 +1533,7 @@ late_abort_fixup(arg)
 				offset = fault_instruction & 0x0f;
 				if (offset == base)
 					return ABORT_FIXUP_FAILED;
-                
+
 				/*
 				 * Register offset - hard we have to
 				 * cope with shifts !
@@ -1647,8 +1647,8 @@ static u_int parse_cpu_options(char *, s
 static u_int
 parse_cpu_options(args, optlist, cpuctrl)
 	char *args;
-	struct cpu_option *optlist;    
-	u_int cpuctrl; 
+	struct cpu_option *optlist;
+	u_int cpuctrl;
 {
 	int integer;
 
@@ -1811,7 +1811,7 @@ arm8_setup(args)
 	ctrl = cpuctrl;
 	cpu_control(0xffffffff, cpuctrl);
 
-	/* Set the clock/test register */    
+	/* Set the clock/test register */
 	if (setclock)
 		arm8_clock_config(0x7f, clocktest);
 }
@@ -1891,7 +1891,7 @@ arm10_setup(args)
 	int cpuctrl, cpuctrlmask;
 
 	cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE
-	    | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE 
+	    | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
 	    | CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_BPRD_ENABLE;
 	cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE
 	    | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
@@ -2031,7 +2031,7 @@ sa110_setup(args)
 /*	cpu_control(cpuctrlmask, cpuctrl);*/
 	cpu_control(0xffffffff, cpuctrl);
 
-	/* 
+	/*
 	 * enable clockswitching, note that this doesn't read or write to r0,
 	 * r0 is just to make it valid asm
 	 */
@@ -2089,7 +2089,7 @@ sa11x0_setup(args)
 		cpuctrl |= CPU_CONTROL_VECRELOC;
 	/* Clear out the cache */
 	cpu_idcache_wbinv_all();
-	/* Set the control register */    
+	/* Set the control register */
 	ctrl = cpuctrl;
 	cpu_control(0xffffffff, cpuctrl);
 }
@@ -2198,7 +2198,7 @@ ixp12x0_setup(args)
 	/* Clear out the cache */
 	cpu_idcache_wbinv_all();
 
-	/* Set the control register */    
+	/* Set the control register */
 	ctrl = cpuctrl;
 	/* cpu_control(0xffffffff, cpuctrl); */
 	cpu_control(cpuctrlmask, cpuctrl);
@@ -2292,5 +2292,5 @@ xscale_setup(args)
 	__asm __volatile("mcr p15, 0, %0, c1, c0, 1"
 		: : "r" (auxctl));
 }
-#endif	/* CPU_XSCALE_80200 || CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425 
+#endif	/* CPU_XSCALE_80200 || CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425
 	   CPU_XSCALE_80219 */

Modified: stable/9/sys/arm/arm/cpufunc_asm.S
==============================================================================
--- stable/9/sys/arm/arm/cpufunc_asm.S	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/cpufunc_asm.S	Mon Jun 17 20:26:19 2013	(r251866)
@@ -34,14 +34,14 @@
  *
  * RiscBSD kernel project
  *
- * cpufunc.S 
+ * cpufunc.S
  *
  * Assembly functions for CPU / MMU / TLB specific operations
  *
  * Created      : 30/01/97
  *
  */
- 
+
 #include <machine/asm.h>
 __FBSDID("$FreeBSD$");
 
@@ -86,13 +86,13 @@ ENTRY(cpufunc_faultaddress)
  * Generic functions to write the internal coprocessor registers
  *
  *
- * Currently these registers are 
+ * Currently these registers are
  *  c1 - CPU Control
  *  c3 - Domain Access Control
  *
  * All other registers are CPU architecture specific
  */
- 
+
 #if 0 /* See below. */
 ENTRY(cpufunc_control)
 	mcr	p15, 0, r0, c1, c0, 0
@@ -107,12 +107,12 @@ ENTRY(cpufunc_domains)
  * Generic functions to read/modify/write the internal coprocessor registers
  *
  *
- * Currently these registers are 
+ * Currently these registers are
  *  c1 - CPU Control
  *
  * All other registers are CPU architecture specific
  */
- 
+
 ENTRY(cpufunc_control)
 	mrc	p15, 0, r3, c1, c0, 0	/* Read the control register */
 	bic	r2, r3, r0		/* Clear bits */

Modified: stable/9/sys/arm/arm/cpufunc_asm_arm10.S
==============================================================================
--- stable/9/sys/arm/arm/cpufunc_asm_arm10.S	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/cpufunc_asm_arm10.S	Mon Jun 17 20:26:19 2013	(r251866)
@@ -31,7 +31,7 @@
  * ARM10 assembly functions for CPU / MMU / TLB specific operations
  *
  */
- 
+
 #include <machine/asm.h>
 __FBSDID("$FreeBSD$");
 
@@ -255,7 +255,7 @@ ENTRY(arm10_context_switch)
 
 /*
  * Parameters for the cache cleaning code.  Note that the order of these
- * four variables is assumed in the code above.  Hence the reason for 
+ * four variables is assumed in the code above.  Hence the reason for
  * declaring them in the assembler file.
  */
 	.align 0

Modified: stable/9/sys/arm/arm/cpufunc_asm_arm11.S
==============================================================================
--- stable/9/sys/arm/arm/cpufunc_asm_arm11.S	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/cpufunc_asm_arm11.S	Mon Jun 17 20:26:19 2013	(r251866)
@@ -33,7 +33,7 @@
  * XXX We make no attempt at present to take advantage of the v6 memroy
  * architecture or physically tagged cache.
  */
- 
+
 #include <machine/asm.h>
 __FBSDID("$FreeBSD$");
 

Modified: stable/9/sys/arm/arm/cpufunc_asm_arm7tdmi.S
==============================================================================
--- stable/9/sys/arm/arm/cpufunc_asm_arm7tdmi.S	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/cpufunc_asm_arm7tdmi.S	Mon Jun 17 20:26:19 2013	(r251866)
@@ -34,7 +34,7 @@
  * ARM7TDMI assembly functions for CPU / MMU / TLB specific operations
  *
  */
- 
+
 #include <machine/asm.h>
 __FBSDID("$FreeBSD$");
 

Modified: stable/9/sys/arm/arm/cpufunc_asm_arm8.S
==============================================================================
--- stable/9/sys/arm/arm/cpufunc_asm_arm8.S	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/cpufunc_asm_arm8.S	Mon Jun 17 20:26:19 2013	(r251866)
@@ -35,7 +35,7 @@
  * ARM8 assembly functions for CPU / MMU / TLB specific operations
  *
  */
- 
+
 #include <machine/asm.h>
 __FBSDID("$FreeBSD$");
 

Modified: stable/9/sys/arm/arm/cpufunc_asm_arm9.S
==============================================================================
--- stable/9/sys/arm/arm/cpufunc_asm_arm9.S	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/cpufunc_asm_arm9.S	Mon Jun 17 20:26:19 2013	(r251866)
@@ -30,7 +30,7 @@
  *
  * ARM9 assembly functions for CPU / MMU / TLB specific operations
  */
- 
+
 #include <machine/asm.h>
 __FBSDID("$FreeBSD$");
 
@@ -242,7 +242,7 @@ ENTRY(arm9_context_switch)
 
 /*
  * Parameters for the cache cleaning code.  Note that the order of these
- * four variables is assumed in the code above.  Hence the reason for 
+ * four variables is assumed in the code above.  Hence the reason for
  * declaring them in the assembler file.
  */
 	.align 0

Modified: stable/9/sys/arm/arm/cpufunc_asm_armv4.S
==============================================================================
--- stable/9/sys/arm/arm/cpufunc_asm_armv4.S	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/cpufunc_asm_armv4.S	Mon Jun 17 20:26:19 2013	(r251866)
@@ -36,7 +36,7 @@
  * ARM9 assembly functions for CPU / MMU / TLB specific operations
  *
  */
- 
+
 #include <machine/asm.h>
 __FBSDID("$FreeBSD$");
 

Modified: stable/9/sys/arm/arm/cpufunc_asm_armv5.S
==============================================================================
--- stable/9/sys/arm/arm/cpufunc_asm_armv5.S	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/cpufunc_asm_armv5.S	Mon Jun 17 20:26:19 2013	(r251866)
@@ -32,7 +32,7 @@
  * These routines can be used by any core that supports the set/index
  * operations.
  */
- 
+
 #include <machine/asm.h>
 __FBSDID("$FreeBSD$");
 
@@ -224,7 +224,7 @@ ENTRY(armv5_dcache_wbinv_all)
 
 /*
  * Parameters for the cache cleaning code.  Note that the order of these
- * four variables is assumed in the code above.  Hence the reason for 
+ * four variables is assumed in the code above.  Hence the reason for
  * declaring them in the assembler file.
  */
 	.align 0

Modified: stable/9/sys/arm/arm/cpufunc_asm_sa1.S
==============================================================================
--- stable/9/sys/arm/arm/cpufunc_asm_sa1.S	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/cpufunc_asm_sa1.S	Mon Jun 17 20:26:19 2013	(r251866)
@@ -35,7 +35,7 @@
  * SA-1 assembly functions for CPU / MMU / TLB specific operations
  *
  */
- 
+
 #include <machine/asm.h>
 __FBSDID("$FreeBSD$");
 
@@ -58,7 +58,7 @@ ENTRY(sa1_setttb)
 #else
 	ldr	r3, .Lblock_userspace_access
 	ldr	r2, [r3]
-	orr	r1, r2, #1 
+	orr	r1, r2, #1
 	str	r1, [r3]
 #endif
 	stmfd	sp!, {r0-r3, lr}
@@ -67,7 +67,7 @@ ENTRY(sa1_setttb)
 	mcr	p15, 0, r0, c7, c5, 0	/* invalidate I$ and BTB */
 	mcr	p15, 0, r0, c7, c10, 4	/* drain write and fill buffer */
 
-	/* Write the TTB */ 
+	/* Write the TTB */
 	mcr	p15, 0, r0, c2, c0, 0
 
 	/* If we have updated the TTB we must flush the TLB */

Modified: stable/9/sys/arm/arm/cpufunc_asm_xscale.S
==============================================================================
--- stable/9/sys/arm/arm/cpufunc_asm_xscale.S	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/cpufunc_asm_xscale.S	Mon Jun 17 20:26:19 2013	(r251866)
@@ -71,7 +71,7 @@
  *
  * XScale assembly functions for CPU / MMU / TLB specific operations
  */
- 
+
 #include <machine/asm.h>
 __FBSDID("$FreeBSD$");
 
@@ -138,7 +138,7 @@ ENTRY(xscale_setttb)
 #else
 	ldr	r3, .Lblock_userspace_access
 	ldr	r2, [r3]
-	orr	r1, r2, #1 
+	orr	r1, r2, #1
 	str	r1, [r3]
 #endif
 	stmfd	sp!, {r0-r3, lr}
@@ -150,7 +150,7 @@ ENTRY(xscale_setttb)
 
 	ldmfd	sp!, {r0-r3, lr}
 
-	/* Write the TTB */ 
+	/* Write the TTB */
 	mcr	p15, 0, r0, c2, c0, 0
 
 	/* If we have updated the TTB we must flush the TLB */

Modified: stable/9/sys/arm/arm/cpufunc_asm_xscale_c3.S
==============================================================================
--- stable/9/sys/arm/arm/cpufunc_asm_xscale_c3.S	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/cpufunc_asm_xscale_c3.S	Mon Jun 17 20:26:19 2013	(r251866)
@@ -72,7 +72,7 @@
  *
  * XScale core 3 assembly functions for CPU / MMU / TLB specific operations
  */
- 
+
 #include <machine/asm.h>
 __FBSDID("$FreeBSD$");
 
@@ -339,7 +339,7 @@ ENTRY(xscalec3_setttb)
 #else
 	ldr	r3, .Lblock_userspace_access
 	ldr	r2, [r3]
-	orr	r1, r2, #1 
+	orr	r1, r2, #1
 	str	r1, [r3]
 #endif
 	stmfd	sp!, {r0-r3, lr}
@@ -354,7 +354,7 @@ ENTRY(xscalec3_setttb)
 #ifdef ARM_USE_L2_CACHE
 	orr	r0, r0, #0x18	/* cache the page table in L2 */
 #endif
-	/* Write the TTB */ 
+	/* Write the TTB */
 	mcr	p15, 0, r0, c2, c0, 0
 
 	/* If we have updated the TTB we must flush the TLB */

Modified: stable/9/sys/arm/arm/db_disasm.c
==============================================================================
--- stable/9/sys/arm/arm/db_disasm.c	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/db_disasm.c	Mon Jun 17 20:26:19 2013	(r251866)
@@ -50,7 +50,7 @@ static u_int db_disasm_read_word(u_int);
 static void db_disasm_printaddr(u_int);
 
 static const disasm_interface_t db_disasm_interface = {
-	db_disasm_read_word, 
+	db_disasm_read_word,
 	db_disasm_printaddr,
        	db_printf
 };

Modified: stable/9/sys/arm/arm/db_interface.c
==============================================================================
--- stable/9/sys/arm/arm/db_interface.c	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/db_interface.c	Mon Jun 17 20:26:19 2013	(r251866)
@@ -6,24 +6,24 @@
  * Mach Operating System
  * Copyright (c) 1991,1990 Carnegie Mellon University
  * All Rights Reserved.
- * 
+ *
  * Permission to use, copy, modify and distribute this software and its
  * documentation is hereby granted, provided that both the copyright
  * notice and this permission notice appear in all copies of the
  * software, derivative works or modified versions, and any portions
  * thereof, and that both notices appear in supporting documentation.
- * 
+ *
  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
+ *
  * Carnegie Mellon requests users of this software to return to
- * 
+ *
  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
  *  School of Computer Science
  *  Carnegie Mellon University
  *  Pittsburgh PA 15213-3890
- * 
+ *
  * any improvements or extensions that they make and grant Carnegie the
  * rights to redistribute these changes.
  *
@@ -325,7 +325,7 @@ branch_taken(u_int insn, db_addr_t pc)
 					break;
 				default:
 					break; /* XXX */
-				}	    
+				}
 					
 			}
 			return (addr + offset);

Modified: stable/9/sys/arm/arm/db_trace.c
==============================================================================
--- stable/9/sys/arm/arm/db_trace.c	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/db_trace.c	Mon Jun 17 20:26:19 2013	(r251866)
@@ -7,24 +7,24 @@
  * Mach Operating System
  * Copyright (c) 1991,1990 Carnegie Mellon University
  * All Rights Reserved.
- * 
+ *
  * Permission to use, copy, modify and distribute this software and its
  * documentation is hereby granted, provided that both the copyright
  * notice and this permission notice appear in all copies of the
  * software, derivative works or modified versions, and any portions
  * thereof, and that both notices appear in supporting documentation.
- * 
+ *
  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
+ *
  * Carnegie Mellon requests users of this software to return to
- * 
+ *
  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
  *  School of Computer Science
  *  Carnegie Mellon University
  *  Pittsburgh PA 15213-3890
- * 
+ *
  * any improvements or extensions that they make and grant Carnegie the
  * rights to redistribute these changes.
  */
@@ -55,7 +55,7 @@ __FBSDID("$FreeBSD$");
  * a structure to represent them is a good idea.
  *
  * Here's the diagram from the APCS.  Increasing address is _up_ the page.
- * 
+ *
  *          save code pointer       [fp]        <- fp points to here
  *          return link value       [fp, #-4]
  *          return sp value         [fp, #-8]
@@ -72,9 +72,9 @@ __FBSDID("$FreeBSD$");
  *          [saved a2 value]
  *          [saved a1 value]
  *
- * The save code pointer points twelve bytes beyond the start of the 
- * code sequence (usually a single STM) that created the stack frame.  
- * We have to disassemble it if we want to know which of the optional 
+ * The save code pointer points twelve bytes beyond the start of the
+ * code sequence (usually a single STM) that created the stack frame.
+ * We have to disassemble it if we want to know which of the optional
  * fields are actually present.
  */
 

Modified: stable/9/sys/arm/arm/disassem.c
==============================================================================
--- stable/9/sys/arm/arm/disassem.c	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/disassem.c	Mon Jun 17 20:26:19 2013	(r251866)
@@ -131,9 +131,9 @@ static const struct arm32_insn arm32_i[]
     { 0x0c500000, 0x04400000, "strb",	"daW" },
     { 0x0c500000, 0x04500000, "ldrb",	"daW" },
     { 0x0e1f0000, 0x080d0000, "stm",	"YnWl" },/* separate out r13 base */
-    { 0x0e1f0000, 0x081d0000, "ldm",	"YnWl" },/* separate out r13 base */    
+    { 0x0e1f0000, 0x081d0000, "ldm",	"YnWl" },/* separate out r13 base */
     { 0x0e100000, 0x08000000, "stm",	"XnWl" },
-    { 0x0e100000, 0x08100000, "ldm",	"XnWl" },    
+    { 0x0e100000, 0x08100000, "ldm",	"XnWl" },
     { 0x0e1000f0, 0x00100090, "ldrb",	"de" },
     { 0x0e1000f0, 0x00000090, "strb",	"de" },
     { 0x0e1000f0, 0x001000d0, "ldrsb",	"de" },
@@ -329,7 +329,7 @@ disasm(const disasm_interface_t *di, vm_
 				di->di_printf("#0x%08x",
 					      (insn & 0xff) << (32 - rotate) |
 					      (insn & 0xff) >> rotate);
-			} else {  
+			} else {
 				disasm_register_shift(di, insn);
 			}
 			break;

Modified: stable/9/sys/arm/arm/dump_machdep.c
==============================================================================
--- stable/9/sys/arm/arm/dump_machdep.c	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/dump_machdep.c	Mon Jun 17 20:26:19 2013	(r251866)
@@ -197,7 +197,7 @@ cb_dumpdata(struct md_pa *mdp, int seqnr
 #ifdef SW_WATCHDOG
 		wdog_kern_pat(WD_LASTVAL);
 #endif
-		error = dump_write(di, 
+		error = dump_write(di,
 		    (void *)(pa - (pa & L1_ADDR_BITS)),0, dumplo, sz);
 		if (error)
 			break;

Modified: stable/9/sys/arm/arm/elf_trampoline.c
==============================================================================
--- stable/9/sys/arm/arm/elf_trampoline.c	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/elf_trampoline.c	Mon Jun 17 20:26:19 2013	(r251866)
@@ -202,7 +202,7 @@ _startC(void)
 			 "orr %0, %0, %1\n"
 			 "mrc p15, 0, %1, c1, c0, 0\n"
 			 "bic %1, %1, #1\n" /* Disable MMU */
-			 "orr %1, %1, #(4 | 8)\n" /* Add DC enable, 
+			 "orr %1, %1, #(4 | 8)\n" /* Add DC enable,
 						     WBUF enable */
 			 "orr %1, %1, #0x1000\n" /* Add IC enable */
 			 "orr %1, %1, #(0x800)\n" /* BPRD enable */
@@ -397,7 +397,7 @@ inflate_kernel(void *kernel, void *start
 #endif
 
 void *
-load_kernel(unsigned int kstart, unsigned int curaddr,unsigned int func_end, 
+load_kernel(unsigned int kstart, unsigned int curaddr,unsigned int func_end,
     int d)
 {
 	Elf32_Ehdr *eh;
@@ -436,7 +436,7 @@ load_kernel(unsigned int kstart, unsigne
 					if (phdr[j].p_type == PT_LOAD &&
 					    shdr[i].sh_offset >=
 					    phdr[j].p_offset &&
-					    (shdr[i].sh_offset + 
+					    (shdr[i].sh_offset +
 					     shdr[i].sh_size <=
 					     phdr[j].p_offset +
 					     phdr[j].p_filesz)) {
@@ -445,7 +445,7 @@ load_kernel(unsigned int kstart, unsigne
 						j = eh->e_phnum;
 					}
 				}
-				if (shdr[i].sh_offset != 0 && 
+				if (shdr[i].sh_offset != 0 &&
 				    shdr[i].sh_size != 0) {
 					symtabindex = i;
 					symstrindex = shdr[i].sh_link;
@@ -457,7 +457,7 @@ load_kernel(unsigned int kstart, unsigne
 			ssym = lastaddr;
 			if (d) {
 				memcpy((void *)func_end, (void *)(
-				    shdr[symtabindex].sh_offset + kstart), 
+				    shdr[symtabindex].sh_offset + kstart),
 				    shdr[symtabindex].sh_size);
 				memcpy((void *)(func_end +
 				    shdr[symtabindex].sh_size),
@@ -469,7 +469,7 @@ load_kernel(unsigned int kstart, unsigne
 				    sizeof(shdr[symtabindex].sh_size));
 				lastaddr += sizeof(shdr[symstrindex].sh_size);
 				lastaddr += shdr[symstrindex].sh_size;
-				lastaddr = roundup(lastaddr, 
+				lastaddr = roundup(lastaddr,
 				    sizeof(shdr[symstrindex].sh_size));
 			}
 			
@@ -488,13 +488,13 @@ load_kernel(unsigned int kstart, unsigne
 		    (void*)(kstart + phdr[i].p_offset), phdr[i].p_filesz);
 		/* Clean space from oversized segments, eg: bss. */
 		if (phdr[i].p_filesz < phdr[i].p_memsz)
-			bzero((void *)(phdr[i].p_vaddr - KERNVIRTADDR + 
+			bzero((void *)(phdr[i].p_vaddr - KERNVIRTADDR +
 			    curaddr + phdr[i].p_filesz), phdr[i].p_memsz -
 			    phdr[i].p_filesz);
 	}
 	/* Now grab the symbol tables. */
 	if (symtabindex >= 0 && symstrindex >= 0) {
-		*(Elf_Size *)lastaddr = 
+		*(Elf_Size *)lastaddr =
 		    shdr[symtabindex].sh_size;
 		lastaddr += sizeof(shdr[symtabindex].sh_size);
 		memcpy((void*)lastaddr,
@@ -511,7 +511,7 @@ load_kernel(unsigned int kstart, unsigne
 			    shdr[symtabindex].sh_size),
 		    shdr[symstrindex].sh_size);
 		lastaddr += shdr[symstrindex].sh_size;
-		lastaddr = roundup(lastaddr, 
+		lastaddr = roundup(lastaddr,
    		    sizeof(shdr[symstrindex].sh_size));
 		*(Elf_Addr *)curaddr = MAGIC_TRAMP_NUMBER;
 		*((Elf_Addr *)curaddr + 1) = ssym - curaddr + KERNVIRTADDR;
@@ -572,10 +572,10 @@ setup_pagetables(unsigned int pt_addr, v
 			 "sub pc, pc, #4\n" :
 			 "=r" (tmp) : "r" (pd), "r" (domain));
 	
-	/* 
+	/*
 	 * XXX: This is the most stupid workaround I've ever wrote.
 	 * For some reason, the KB9202 won't boot the kernel unless
-	 * we access an address which is not in the 
+	 * we access an address which is not in the
 	 * 0x20000000 - 0x20ffffff range. I hope I'll understand
 	 * what's going on later.
 	 */
@@ -596,7 +596,7 @@ __start(void)
 	curaddr = (void*)((unsigned int)curaddr & 0xfff00000);
 #ifdef KZIP
 	if (*kernel == 0x1f && kernel[1] == 0x8b) {
-		pt_addr = (((int)&_end + KERNSIZE + 0x100) & 
+		pt_addr = (((int)&_end + KERNSIZE + 0x100) &
 		    ~(L1_TABLE_SIZE - 1)) + L1_TABLE_SIZE;
 		
 #ifdef CPU_ARM9
@@ -609,15 +609,15 @@ __start(void)
 		/* Gzipped kernel */
 		dst = inflate_kernel(kernel, &_end);
 		kernel = (char *)&_end;
-		altdst = 4 + load_kernel((unsigned int)kernel, 
+		altdst = 4 + load_kernel((unsigned int)kernel,
 		    (unsigned int)curaddr,
 		    (unsigned int)&func_end + 800 , 0);
 		if (altdst > dst)
 			dst = altdst;
 	} else
 #endif
-		dst = 4 + load_kernel((unsigned int)&kernel_start, 
-	    (unsigned int)curaddr, 
+		dst = 4 + load_kernel((unsigned int)&kernel_start,
+	    (unsigned int)curaddr,
 	    (unsigned int)&func_end, 0);
 	dst = (void *)(((vm_offset_t)dst & ~3));
 	pt_addr = ((unsigned int)dst &~(L1_TABLE_SIZE - 1)) + L1_TABLE_SIZE;
@@ -626,8 +626,8 @@ __start(void)
 	sp = pt_addr + L1_TABLE_SIZE + 8192;
 	sp = sp &~3;
 	dst = (void *)(sp + 4);
-	memcpy((void *)dst, (void *)&load_kernel, (unsigned int)&func_end - 
+	memcpy((void *)dst, (void *)&load_kernel, (unsigned int)&func_end -
 	    (unsigned int)&load_kernel + 800);
-	do_call(dst, kernel, dst + (unsigned int)(&func_end) - 
+	do_call(dst, kernel, dst + (unsigned int)(&func_end) -
 	    (unsigned int)(&load_kernel) + 800, sp);
 }

Modified: stable/9/sys/arm/arm/exception.S
==============================================================================
--- stable/9/sys/arm/arm/exception.S	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/exception.S	Mon Jun 17 20:26:19 2013	(r251866)
@@ -189,7 +189,7 @@ Laddress_exception_msg:
  * This function uses PULLFRAMEFROMSVCANDEXIT and
  * DO_AST
  * only be called if the exception handler used PUSHFRAMEINSVC
- * 
+ *
  */
 
 exception_exit:

Modified: stable/9/sys/arm/arm/gdb_machdep.c
==============================================================================
--- stable/9/sys/arm/arm/gdb_machdep.c	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/gdb_machdep.c	Mon Jun 17 20:26:19 2013	(r251866)
@@ -70,8 +70,8 @@ gdb_cpu_getreg(int regnum, size_t *regsz
 	case 12:  return (&kdb_thrctx->un_32.pcb32_r12);
 	case 13:  stacktest = kdb_thrctx->un_32.pcb32_sp + 5 * 4;
 		  return (&stacktest);
-	case 15: 
-		  /* 
+	case 15:
+		  /*
 		   * On context switch, the PC is not put in the PCB, but
 		   * we can retrieve it from the stack.
 		   */

Modified: stable/9/sys/arm/arm/in_cksum.c
==============================================================================
--- stable/9/sys/arm/arm/in_cksum.c	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/in_cksum.c	Mon Jun 17 20:26:19 2013	(r251866)
@@ -149,4 +149,4 @@ u_int in_cksum_hdr(const struct ip *ip)
     	union l_util l_util;
 	REDUCE16;
 	return (~sum & 0xffff);
-}			    
+}

Modified: stable/9/sys/arm/arm/intr.c
==============================================================================
--- stable/9/sys/arm/arm/intr.c	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/intr.c	Mon Jun 17 20:26:19 2013	(r251866)
@@ -40,7 +40,7 @@
 __FBSDID("$FreeBSD$");
 #include <sys/param.h>
 #include <sys/systm.h>
-#include <sys/syslog.h> 
+#include <sys/syslog.h>
 #include <sys/malloc.h>
 #include <sys/proc.h>
 #include <sys/bus.h>
@@ -62,7 +62,7 @@ void	arm_handler_execute(struct trapfram
 void (*arm_post_filter)(void *) = NULL;
 
 void
-arm_setup_irqhandler(const char *name, driver_filter_t *filt, 
+arm_setup_irqhandler(const char *name, driver_filter_t *filt,
     void (*hand)(void*), void *arg, int irq, int flags, void **cookiep)
 {
 	struct intr_event *event;
@@ -78,7 +78,7 @@ arm_setup_irqhandler(const char *name, d
 		if (error)
 			return;
 		intr_events[irq] = event;
-		last_printed += 
+		last_printed +=
 		    snprintf(intrnames + last_printed,
 		    MAXCOMLEN + 1,
 		    "irq%d: %s", irq, name);

Modified: stable/9/sys/arm/arm/irq_dispatch.S
==============================================================================
--- stable/9/sys/arm/arm/irq_dispatch.S	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/irq_dispatch.S	Mon Jun 17 20:26:19 2013	(r251866)
@@ -103,7 +103,7 @@ ASENTRY_NP(irq_entry)
 
 	.global _C_LABEL(intrnames), _C_LABEL(sintrnames)
 	.global _C_LABEL(intrcnt), _C_LABEL(sintrcnt)
-_C_LABEL(intrnames): 
+_C_LABEL(intrnames):
 	.space NIRQ * (MAXCOMLEN + 1)
 _C_LABEL(intrcnt):
 	.space NIRQ * 4

Modified: stable/9/sys/arm/arm/machdep.c
==============================================================================
--- stable/9/sys/arm/arm/machdep.c	Mon Jun 17 20:18:12 2013	(r251865)
+++ stable/9/sys/arm/arm/machdep.c	Mon Jun 17 20:26:19 2013	(r251866)
@@ -139,14 +139,14 @@ sendsig(catcher, ksi, mask)
 	/* Allocate and validate space for the signal handler context. */
 	if ((td->td_flags & TDP_ALTSTACK) != 0 && !(onstack) &&
 	    SIGISMEMBER(psp->ps_sigonstack, sig)) {
-		fp = (struct sigframe *)(td->td_sigstk.ss_sp + 
+		fp = (struct sigframe *)(td->td_sigstk.ss_sp +
 		    td->td_sigstk.ss_size);
 #if defined(COMPAT_43)
 		td->td_sigstk.ss_flags |= SS_ONSTACK;
 #endif
 	} else
 		fp = (struct sigframe *)td->td_frame->tf_usr_sp;
-		 
+
 	/* make room on the stack */
 	fp--;
 	
@@ -156,7 +156,7 @@ sendsig(catcher, ksi, mask)
 	get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
 	frame.sf_si = ksi->ksi_info;
 	frame.sf_uc.uc_sigmask = *mask;
-	frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK ) 
+	frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK )
 	    ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE;
 	frame.sf_uc.uc_stack = td->td_sigstk;
 	mtx_unlock(&psp->ps_mtx);
@@ -449,7 +449,7 @@ ptrace_single_step(struct thread *td)
 	 ("Didn't clear single step"));
 	p = td->td_proc;
 	PROC_UNLOCK(p);
-	error = ptrace_read_int(td, td->td_frame->tf_pc + 4, 
+	error = ptrace_read_int(td, td->td_frame->tf_pc + 4,

*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201306172026.r5HKQJpJ029063>