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Date:      Tue, 11 Dec 2012 14:45:36 +0100
From:      Matthieu Kraus <matthieu.kraus@s2008.tu-chemnitz.de>
To:        freebsd-arm@freebsd.org
Subject:   interrupt storm on Dreamplug for interrupts 12 and 16
Message-ID:  <20121211144536.70434wqonm247mdc@mail.tu-chemnitz.de>

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Greetings,

I tried updating my kernel on my Dreamplug yesterday (been running  
r228127 so far which worked quite well), however I'm running into  
issues with the ethernet controllers after the update - namely I'm  
constantly getting interrupt storms on interrupts 12 and 16 which  
belong to mge0 and mge1 respecively rendering non-functional.

does anyone have some pointers what may cause it?

the diff I'm running with (old kernel used the same besides the USB  
option to fix the CAM issues) is attached:

the patch for if_mge is pretty old and grabbed from this ML and helps  
against some awful watchdog timeouts I encountered very often, the one  
for cpuvar.h allows to build zfs (I have an external RAID controller  
attached via esata on which my zfs pool resides)

the dts is mostly based off an ultimate-rd one with some adjustments  
based off the settings linux uses

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Index: sys/arm/conf/DREAMPLUG
===================================================================
--- sys/arm/conf/DREAMPLUG	(revision 0)
+++ sys/arm/conf/DREAMPLUG	(working copy)
@@ -0,0 +1,141 @@
+#
+# Custom kernel for GlobalScale Technologies Dreamplug (Kirkwood 88F6281).
+#
+# $FreeBSD: src/sys/arm/conf/DREAMPLUG,v 1.00 2011/11/17 11:49:30 rmacklem Exp $
+#
+
+ident		DREAMPLUG
+include		"../mv/kirkwood/std.db88f6xxx"
+
+options 	SOC_MV_KIRKWOOD
+makeoptions	MODULES_OVERRIDE="zfs opensolaris zlib"
+
+#makeoptions	DEBUG=-g
+#makeoptions	WERROR="-Werror"
+
+# Debugging
+#options         KDB
+#options         DDB
+
+# SCHEDULER
+options 	SCHED_4BSD
+
+# InterNETworking 
+options 	INET
+options 	INET6
+
+# Filesystems
+options 	FFS			# Berkeley Fast Filesystem
+options		CD9660			# ISO 9660 Filesystem
+options		MSDOSFS
+options		PSEUDOFS
+
+# NFS
+options 	NFSCL
+options 	NFSD
+options 	NFSLOCKD
+options 	NFS_ROOT
+
+options 	ROOTDEVNAME=\"ufs:/dev/da1s3a\"
+
+# core options
+options 	SYSVSHM			#SYSV-style shared memory
+options 	SYSVMSG			#SYSV-style message queues
+options 	SYSVSEM			#SYSV-style semaphores
+options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
+options 	MUTEX_NOINLINE
+options 	RWLOCK_NOINLINE
+options 	NO_FFS_SNAPSHOT
+options 	NO_SWAPPING
+
+# Pseudo devices
+device          loop
+device          md
+device          pty
+device          random
+device          firmware
+
+# PCI
+device		pci
+
+# I2C (TWSI)
+device          iic
+device          iicbus
+
+# crypto devices
+#device		cesa		# Marvell security engine
+device		crypto
+device		cryptodev
+
+# Serial ports
+device		uart
+
+# Networking
+device		ether
+device		mii
+device		miibus
+device		mge		# Marvell Gigabit Ethernet controller
+device		e1000phy
+device		bpf 
+
+# Sound
+device		sound
+
+# USB
+#options		USB_DEBUG
+device		usb
+option USB_HOST_ALIGN=32 # data cache line size on your platform
+device		ehci
+device		umass
+device		usfs
+device		cdce
+device		uhid
+device		snd_uaudio
+
+# CAM/SCSI
+# options		CAMDEBUG
+device		scbus
+device		da
+
+# SATA
+device		mvs
+device		ahci
+device		ada
+
+# MMC/SD
+device		mmc
+device		mmcsd
+#device		mv_sdio
+
+# WLAN
+#device		wlan            # 802.11 support
+#device		wlan_wep        # 802.11 WEP support
+#device		wlan_ccmp       # 802.11 CCMP support
+#device		wlan_tkip       # 802.11 TKIP support
+
+# Flattened Device Tree
+options 	FDT
+options		FDT_DTB_STATIC
+makeoptions	FDT_DTS_FILE=dreamplug.dts
+
+# PF
+device  	pf
+device  	pflog
+
+# ALTQ
+options 	ALTQ
+options 	ALTQ_CBQ        # Class Bases Queuing (CBQ)
+options 	ALTQ_RED        # Random Early Detection (RED)
+options 	ALTQ_RIO        # RED In/Out
+options 	ALTQ_HFSC       # Hierarchical Packet Scheduler (HFSC)
+options 	ALTQ_PRIQ       # Priority Queuing (PRIQ)
+
+# IPSEC
+#options 	IPSEC
+#options 	IPSEC_NAT_T
+
+# GEOM
+options		GEOM_PART_GPT
+options		GEOM_LABEL
+options		GEOM_ELI
+
Index: sys/boot/fdt/dts/dreamplug.dts
===================================================================
--- sys/boot/fdt/dts/dreamplug.dts	(revision 0)
+++ sys/boot/fdt/dts/dreamplug.dts	(working copy)
@@ -0,0 +1,351 @@
+/*
+ * Copyright (c) 2010 The FreeBSD Foundation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * Marvell DreamPlug Device Tree Source.
+ *
+ * $FreeBSD: head/sys/boot/fdt/dts/dreamplug.dts,v 1.1 2010/05/26 09:50:09 raj Exp $
+ */
+
+/dts-v1/;
+
+/ {
+	model = "mrvl,DreamPlug";
+	compatible = "DreamPlug";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	aliases {
+		ethernet0 = &enet0;
+		ethernet1 = &enet1;
+		mpp = &MPP;
+		serial0 = &serial0;
+		serial1 = &serial1;
+		soc = &SOC;
+		sram = &SRAM;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "ARM,88FR131";
+			reg = <0x0>;
+			d-cache-line-size = <32>;	// 32 bytes
+			i-cache-line-size = <32>;	// 32 bytes
+			d-cache-size = <0x4000>;	// L1, 16K
+			i-cache-size = <0x4000>;	// L1, 16K
+			timebase-frequency = <0>;
+			bus-frequency = <0>;
+			clock-frequency = <0>;
+		};
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x0 0x20000000>;		// 512M at 0x0
+	};
+
+	localbus@f1000000 {
+		#address-cells = <2>;
+		#size-cells = <1>;
+		compatible = "mrvl,lbc";
+
+		/* This reflects CPU decode windows setup. */
+		ranges = <0x0 0x0f 0xf9300000 0x00100000
+			  0x1 0x1e 0xfa000000 0x00100000
+			  0x2 0x1d 0xfa100000 0x02000000
+			  0x3 0x1b 0xfc100000 0x00000400>;
+
+		nor@0,0 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "cfi-flash";
+			reg = <0x0 0x0 0x00100000>;
+			bank-width = <2>;
+			device-width = <1>;
+		};
+
+		led@1,0 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "led";
+			reg = <0x1 0x0 0x00100000>;
+		};
+
+		nor@2,0 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "cfi-flash";
+			reg = <0x2 0x0 0x02000000>;
+			bank-width = <2>;
+			device-width = <1>;
+		};
+
+		nand@3,0 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			reg = <0x3 0x0 0x00100000>;
+			bank-width = <2>;
+			device-width = <1>;
+		};
+	};
+
+	SOC: soc88f6281@f1000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "simple-bus";
+		ranges = <0x0 0xf1000000 0x00100000>;
+		bus-frequency = <0>;
+
+		PIC: pic@20200 {
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <1>;
+			reg = <0x20200 0x3c>;
+			compatible = "mrvl,pic";
+		};
+
+		timer@20300 {
+			compatible = "mrvl,timer";
+			reg = <0x20300 0x30>;
+			interrupts = <1>;
+			interrupt-parent = <&PIC>;
+			mrvl,has-wdt;
+		};
+
+		MPP: mpp@10000 {
+			#pin-cells = <2>;
+			compatible = "mrvl,mpp";
+			reg = <0x10000 0x34>;
+			pin-count = <50>;
+			pin-map = <
+				0  1		/* MPP[0]:  NF_IO[2] */
+				1  1		/* MPP[1]:  NF_IO[3] */
+				2  1		/* MPP[2]:  NF_IO[4] */
+				3  1		/* MPP[3]:  NF_IO[5] */
+				4  5		/* MPP[4]:  SATA1_ACTn */
+				5  5		/* MPP[5]:  SATA0_ACTn */
+				6  1		/* MPP[6]:  SYSRST_OUTn */
+				7  0		/* MPP[7]:  GPO */
+				8  5		/* MPP[8]:  SATA1_PRESENTn */
+				9  5		/* MPP[9]:  SATA0_PRESENTn */
+				10 3		/* MPP[10]: UA0_TXD */
+				11 3		/* MPP[11]: UA0_RXD */
+				12 1		/* MPP[12]: SD_CLK */
+				13 1		/* MPP[13]: SD_CMD */
+				14 1		/* MPP[14]: SD_D[0] */
+				15 1		/* MPP[15]: SD_D[1] */
+				16 1		/* MPP[16]: SD_D[2] */
+				17 1		/* MPP[17]: SD_D[3] */
+				18 1		/* MPP[18]: NF_IO[0] */
+				19 1		/* MPP[19]: NF_IO[1] */
+				20 3		/* MPP[20]: GE1_TXD[0] */
+				21 3		/* MPP[21]: GE1_TXD[1] */
+				22 3		/* MPP[22]: GE1_TXD[2] */
+				23 3		/* MPP[23]: GE1_TXD[3] */
+				24 3		/* MPP[24]: GE1_RXD[0] */
+				25 3		/* MPP[25]: GE1_RXD[1] */
+				26 3		/* MPP[26]: GE1_RXD[2] */
+				27 3		/* MPP[27]: GE1_RXD[3] */
+				28 3		/* MPP[28]: GE1_COL */
+				29 3		/* MPP[29]: GE1_TCLK */
+				30 3		/* MPP[30]: GE1_RXCTL */
+				31 3		/* MPP[31]: GE1_RXCLK */
+				32 3		/* MPP[32]: GE1_TCLKOUT */
+				33 3		/* MPP[33]: GE1_TXCTL */
+				34 3		/* MPP[34]: GE1_TXEN */
+				35 3		/* MPP[35]: GE1_RXERR */
+				36 4		/* MPP[36]: SPDIF_I */
+				37 4		/* MPP[37]: SPDIF_O */
+				38 4		/* MPP[38]: SPDIF_RMCLK */
+				46 0		/* MPP[46]: GPIO[46] */ /* M_RLED */
+                                47 0		/* MPP[46]: GPIO[46] */ /* M_GLED */
+                                48 0		/* MPP[46]: GPIO[46] */ /* B_RLED */
+                                49 0 >;		/* MPP[46]: GPIO[46] */ /* B_GLED */
+		};
+
+		GPIO: gpio@10100 {
+			#gpio-cells = <3>;
+			compatible = "mrvl,gpio";
+			reg = <0x10100 0x20>;
+			gpio-controller;
+			interrupts = <35 36 37 38 39 40 41>;
+			interrupt-parent = <&PIC>;
+		};
+
+		/*dreamplug:red:health {
+			compatible = "gpio-led";
+			gpios = <&gpio 46 2 1>;
+		};
+
+		dreamplug:green:health {
+			compatible = "gpio-led";
+			gpios = <&gpio 47 2 1>;
+		};
+
+		dreamplug:red:wmode {
+			compatible = "gpio-led";
+			gpios = <&gpio 48 2 1>;
+		};
+
+		dreamplug:green:wmode {
+			compatible = "gpio-led";
+			gpios = <&gpio 49 2 1>;
+		};*/
+
+		rtc@10300 {
+			compatible = "mrvl,rtc";
+			reg = <0x10300 0x08>;
+		};
+
+		twsi@11000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "mrvl,twsi";
+			reg = <0x11000 0x20>;
+			interrupts = <43>;
+			interrupt-parent = <&PIC>;
+		};
+
+		mdio0: mdio@72000 {
+			device_type = "mdio";
+			compatible = "mrvl,mdio";
+			reg = <0x72000 0x20>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			phy0: ethernet-phy@0 {
+				reg = <0>;
+				device_type = "ethernet-phy";
+			};
+		};
+	
+		mdio1: mdio@76000 {
+			device_type = "mdio";
+			compatible = "mrvl,mdio";
+			reg = <0x76000 0x20>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			phy1: ethernet-phy@0 {
+				reg = <1>;
+				device_type = "ethernet-phy";
+			};
+		};
+
+		enet0: ethernet@72000 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			model = "V2";
+			compatible = "mrvl,ge";
+			reg = <0x72000 0x2000>;
+			ranges = <0x0 0x72000 0x2000>;
+			local-mac-address = [ 00 00 00 00 00 00 ];
+			interrupts = <12 13 14 11 46>;
+			interrupt-parent = <&PIC>;
+			phy-handle = <&phy0>;
+		};
+
+ 		enet1: ethernet@76000 {
+ 			#address-cells = <1>;
+ 			#size-cells = <1>;
+ 			model = "V2";
+ 			compatible = "mrvl,ge";
+ 			reg = <0x76000 0x2000>;
+ 			ranges = <0x0 0x76000 0x2000>;
+ 			local-mac-address = [ 00 00 00 00 00 00 ];
+ 			interrupts = <16 17 18 15 47>;
+ 			interrupt-parent = <&PIC>;
+ 			phy-handle = <&phy1>;
+ 		};
+
+		serial0: serial@12000 {
+			compatible = "ns16550";
+			reg = <0x12000 0x20>;
+			reg-shift = <2>;
+			clock-frequency = <0>;
+			interrupts = <33>;
+			interrupt-parent = <&PIC>;
+		};
+
+		serial1: serial@12100 {
+			compatible = "ns16550";
+			reg = <0x12100 0x20>;
+			reg-shift = <2>;
+			clock-frequency = <0>;
+			interrupts = <34>;
+			interrupt-parent = <&PIC>;
+		};
+
+		crypto@30000 {
+			compatible = "mrvl,cesa";
+			reg = <0x30000 0x10000>;
+			interrupts = <22>;
+			interrupt-parent = <&PIC>;
+
+			sram-handle = <&SRAM>;
+		};
+
+		usb@50000 {
+			compatible = "mrvl,usb-ehci", "usb-ehci";
+			reg = <0x50000 0x1000>;
+			interrupts = <48 19>;
+			interrupt-parent = <&PIC>;
+		};
+
+		xor@60000 {
+			compatible = "mrvl,xor";
+			reg = <0x60000 0x1000>;
+			interrupts = <5 6 7 8>;
+			interrupt-parent = <&PIC>;
+		};
+
+		sata@80000 {
+			compatible = "mrvl,sata";
+			reg = <0x80000 0x6000>;
+			interrupts = <21>;
+			interrupt-parent = <&PIC>;
+		};
+
+		sdio@90000 {
+			compatible = "mrvl,sdio";
+			reg = <0x90000 0x400>;
+			interrupts = <28>;
+			interrupt-parent = <&PIC>;
+		};
+	};
+
+	SRAM: sram@fd000000 {
+		compatible = "mrvl,cesa-sram";
+		reg = <0xfd000000 0x00100000>;
+	};
+
+	chosen {
+		stdin = "serial0";
+		stdout = "serial0";
+	};
+};
Index: sys/cddl/compat/opensolaris/sys/cpuvar.h
===================================================================
--- sys/cddl/compat/opensolaris/sys/cpuvar.h	(revision 244033)
+++ sys/cddl/compat/opensolaris/sys/cpuvar.h	(working copy)
@@ -50,6 +50,9 @@
 
 /* Some code may choose to redefine this if pcpu_t would be more useful. */
 #define cpu_t	solaris_cpu_t
+#ifdef cpu_id
+#undef cpu_id
+#endif
 #define	cpu_id	cpuid
 
 extern solaris_cpu_t    solaris_cpu[];
Index: sys/dev/mge/if_mge.c
===================================================================
--- sys/dev/mge/if_mge.c	(revision 244033)
+++ sys/dev/mge/if_mge.c	(working copy)
@@ -962,7 +962,7 @@
 	reg_val = MGE_READ(sc, MGE_PORT_SERIAL_CTRL);
 	reg_val |= PORT_SERIAL_ENABLE;
 	MGE_WRITE(sc, MGE_PORT_SERIAL_CTRL, reg_val);
-	count = 0x100000;
+	count = 0x10;
 	for (;;) {
 		reg_val = MGE_READ(sc, MGE_PORT_STATUS);
 		if (reg_val & MGE_STATUS_LINKUP)
@@ -1540,7 +1540,7 @@
 	MGE_TRANSMIT_LOCK_ASSERT(sc);
 
 	if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
-	    IFF_DRV_RUNNING)
+	    IFF_DRV_RUNNING || IFM_SUBTYPE(sc->mii->mii_media_active) == IFM_NONE)
 		return;
 
 	for (;;) {

--=_wtrtszsquj48c--




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