From owner-p4-projects@FreeBSD.ORG Wed Nov 12 16:43:49 2003 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 95B4B16A4D0; Wed, 12 Nov 2003 16:43:49 -0800 (PST) Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 7040016A4CE for ; Wed, 12 Nov 2003 16:43:49 -0800 (PST) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id 6C9DA43F3F for ; Wed, 12 Nov 2003 16:43:48 -0800 (PST) (envelope-from peter@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.12.9/8.12.9) with ESMTP id hAD0hmXJ035710 for ; Wed, 12 Nov 2003 16:43:48 -0800 (PST) (envelope-from peter@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.12.9/8.12.9/Submit) id hAD0hlUC035707 for perforce@freebsd.org; Wed, 12 Nov 2003 16:43:47 -0800 (PST) (envelope-from peter@freebsd.org) Date: Wed, 12 Nov 2003 16:43:47 -0800 (PST) Message-Id: <200311130043.hAD0hlUC035707@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to peter@freebsd.org using -f From: Peter Wemm To: Perforce Change Reviews Subject: PERFORCE change 42198 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 13 Nov 2003 00:43:50 -0000 http://perforce.freebsd.org/chv.cgi?CH=42198 Change 42198 by peter@peter_daintree on 2003/11/12 16:43:01 integ -I -b smp_hammer. Gah, conflict city. I guess jhb has been waiting to pay me back for committing Bosko's tlb fixes :-) Affected files ... .. //depot/projects/hammer/sys/amd64/amd64/apic_vector.S#4 integrate .. //depot/projects/hammer/sys/amd64/amd64/intr_machdep.c#8 integrate .. //depot/projects/hammer/sys/amd64/amd64/io_apic.c#17 integrate .. //depot/projects/hammer/sys/amd64/amd64/local_apic.c#19 integrate .. //depot/projects/hammer/sys/amd64/amd64/mp_machdep.c#28 integrate .. //depot/projects/hammer/sys/amd64/include/apicvar.h#10 integrate .. //depot/projects/hammer/sys/amd64/isa/atpic.c#18 integrate .. //depot/projects/hammer/sys/amd64/isa/atpic_vector.S#5 integrate Differences ... ==== //depot/projects/hammer/sys/amd64/amd64/apic_vector.S#4 (text+ko) ==== @@ -32,7 +32,7 @@ * SUCH DAMAGE. * * from: vector.s, 386BSD 0.1 unknown origin - * $FreeBSD: src/sys/i386/i386/apic_vector.s,v 1.91 2003/11/03 21:53:36 jhb Exp $ + * $FreeBSD: src/sys/i386/i386/apic_vector.s,v 1.92 2003/11/12 18:13:57 jhb Exp $ */ /* ==== //depot/projects/hammer/sys/amd64/amd64/intr_machdep.c#8 (text+ko) ==== @@ -26,7 +26,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $FreeBSD: src/sys/i386/i386/intr_machdep.c,v 1.1 2003/11/03 21:25:52 jhb Exp $ + * $FreeBSD: src/sys/i386/i386/intr_machdep.c,v 1.2 2003/11/12 18:13:57 jhb Exp $ */ /* @@ -49,6 +49,7 @@ #include #include #include +#include #include #ifdef DDB #include @@ -152,10 +153,14 @@ void intr_execute_handlers(struct intsrc *isrc, struct intrframe *iframe) { + struct thread *td; struct ithd *it; struct intrhand *ih; int error, vector; + td = curthread; + td->td_intr_nesting_level++; + /* * We count software interrupts when we process them. The * code here follows previous practice, but there's an @@ -165,18 +170,25 @@ atomic_add_long(isrc->is_count, 1); atomic_add_int(&cnt.v_intr, 1); + it = isrc->is_ithread; + ih = TAILQ_FIRST(&it->it_handlers); + /* - * Execute fast interrupt handlers directly. - * To support clock handlers, if a handler registers - * with a NULL argument, then we pass it a pointer to - * a trapframe as its argument. + * XXX: We assume that IRQ 0 is only used for the ISA timer + * device (clk). */ - it = isrc->is_ithread; - ih = TAILQ_FIRST(&it->it_handlers); + vector = isrc->is_pic->pic_vector(isrc); + if (vector == 0) + clkintr_pending = 1; + critical_enter(); - if (ih == NULL) - error = EINVAL; - else if (ih->ih_flags & IH_FAST) { + if (ih != NULL && ih->ih_flags & IH_FAST) { + /* + * Execute fast interrupt handlers directly. + * To support clock handlers, if a handler registers + * with a NULL argument, then we pass it a pointer to + * a trapframe as its argument. + */ TAILQ_FOREACH(ih, &it->it_handlers, ih_next) { MPASS(ih->ih_flags & IH_FAST); CTR3(KTR_INTR, "%s: executing handler %p(%p)", @@ -188,13 +200,22 @@ else ih->ih_handler(ih->ih_argument); } - isrc->is_pic->pic_enable_source(isrc); + isrc->is_pic->pic_eoi_source(isrc); error = 0; - } else - error = ithread_schedule(it, !cold); + } else { + /* + * For stray and threaded interrupts, we mask and EOI the + * source. + */ + isrc->is_pic->pic_disable_source(isrc); + isrc->is_pic->pic_eoi_source(isrc); + if (ih == NULL) + error = EINVAL; + else + error = ithread_schedule(it, !cold); + } critical_exit(); if (error == EINVAL) { - vector = isrc->is_pic->pic_vector(isrc); atomic_add_long(isrc->is_straycount, 1); if (*isrc->is_straycount < MAX_STRAY_LOG) log(LOG_ERR, "stray irq%d\n", vector); @@ -203,6 +224,7 @@ "too many stray irq %d's: not logging anymore\n", vector); } + td->td_intr_nesting_level--; } void ==== //depot/projects/hammer/sys/amd64/amd64/io_apic.c#17 (text+ko) ==== @@ -28,7 +28,7 @@ */ #include -__FBSDID("$FreeBSD: src/sys/i386/i386/io_apic.c,v 1.5 2003/11/07 23:44:35 jhb Exp $"); +__FBSDID("$FreeBSD: src/sys/i386/i386/io_apic.c,v 1.6 2003/11/12 18:13:57 jhb Exp $"); #include "opt_isa.h" #include "opt_mixed_mode.h" @@ -201,8 +201,7 @@ ioapic_eoi_source(struct intsrc *isrc) { - TODO; - /* lapic_eoi(); */ + lapic_eoi(); } /* ==== //depot/projects/hammer/sys/amd64/amd64/local_apic.c#19 (text+ko) ==== @@ -32,7 +32,7 @@ */ #include -__FBSDID("$FreeBSD: src/sys/i386/i386/local_apic.c,v 1.1 2003/11/03 21:53:36 jhb Exp $"); +__FBSDID("$FreeBSD: src/sys/i386/i386/local_apic.c,v 1.2 2003/11/12 18:13:57 jhb Exp $"); #include #include @@ -466,20 +466,22 @@ } void +lapic_eoi(void) +{ + + lapic->eoi = 0; +} + +void lapic_handle_intr(void *cookie, struct intrframe frame) { struct intsrc *isrc; - struct thread *td = curthread; int vec = (uintptr_t)cookie; - td->td_intr_nesting_level++; if (vec == -1) panic("Couldn't get vector from ISR!"); isrc = intr_lookup_source(apic_idt_to_irq(vec)); - isrc->is_pic->pic_disable_source(isrc); - lapic->eoi = 0; intr_execute_handlers(isrc, &frame); - td->td_intr_nesting_level--; } /* Translate between IDT vectors and IRQ vectors. */ ==== //depot/projects/hammer/sys/amd64/amd64/mp_machdep.c#28 (text+ko) ==== @@ -24,7 +24,7 @@ */ #include -__FBSDID("$FreeBSD: src/sys/i386/i386/mp_machdep.c,v 1.223 2003/11/11 17:16:15 jhb Exp $"); +__FBSDID("$FreeBSD: src/sys/i386/i386/mp_machdep.c,v 1.224 2003/11/12 18:13:57 jhb Exp $"); #include "opt_cpu.h" #include "opt_kstack_pages.h" @@ -781,10 +781,11 @@ void forwarded_statclock(struct clockframe frame) { - struct thread *td = curthread; + struct thread *td; + CTR0(KTR_SMP, "forwarded_statclock"); + td = curthread; td->td_intr_nesting_level++; - CTR0(KTR_SMP, "forwarded_statclock"); if (profprocs != 0) profclock(&frame); if (pscnt == psdiv) @@ -817,10 +818,11 @@ void forwarded_hardclock(struct clockframe frame) { - struct thread *td = curthread; + struct thread *td; + CTR0(KTR_SMP, "forwarded_hardclock"); + td = curthread; td->td_intr_nesting_level++; - CTR0(KTR_SMP, "forwarded_hardclock"); hardclock_process(&frame); td->td_intr_nesting_level--; } ==== //depot/projects/hammer/sys/amd64/include/apicvar.h#10 (text+ko) ==== @@ -26,7 +26,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $FreeBSD: src/sys/i386/include/apicvar.h,v 1.1 2003/11/03 21:53:38 jhb Exp $ + * $FreeBSD: src/sys/i386/include/apicvar.h,v 1.2 2003/11/12 18:13:57 jhb Exp $ */ #ifndef _MACHINE_APICVAR_H_ @@ -149,6 +149,7 @@ void lapic_disable(void); void lapic_dump(const char *str); void lapic_enable_intr(u_int vector); +void lapic_eoi(void); int lapic_id(void); void lapic_init(uintptr_t addr); int lapic_intr_pending(u_int vector); ==== //depot/projects/hammer/sys/amd64/isa/atpic.c#18 (text+ko) ==== @@ -32,7 +32,7 @@ */ #include -__FBSDID("$FreeBSD: src/sys/i386/isa/atpic.c,v 1.2 2003/11/04 13:13:04 nyan Exp $"); +__FBSDID("$FreeBSD: src/sys/i386/isa/atpic.c,v 1.3 2003/11/12 18:13:57 jhb Exp $"); #include "opt_isa.h" @@ -169,6 +169,10 @@ mtx_unlock_spin(&icu_lock); } +/* + * The data sheet says no auto-EOI on slave, but it sometimes works. + * So, if AUTO_EOI_2 is enabled, we use it. + */ static void atpic_eoi_slave(struct intsrc *isrc) { @@ -293,17 +297,14 @@ SYSINIT(atpic_init, SI_SUB_INTR, SI_ORDER_SECOND + 1, atpic_init, NULL) void -atpic_sched_ithd(void *cookie, struct intrframe iframe) +atpic_handle_intr(void *cookie, struct intrframe iframe) { struct intsrc *isrc; - struct thread *td = curthread; int vec = (uintptr_t)cookie; KASSERT(vec < ICU_LEN, ("unknown int %d\n", vec)); - td->td_intr_nesting_level++; isrc = &atintrs[vec].at_intsrc; intr_execute_handlers(isrc, &iframe); - td->td_intr_nesting_level--; } #ifdef DEV_ISA ==== //depot/projects/hammer/sys/amd64/isa/atpic_vector.S#5 (text+ko) ==== @@ -32,7 +32,7 @@ * SUCH DAMAGE. * * from: vector.s, 386BSD 0.1 unknown origin - * $FreeBSD: src/sys/i386/isa/atpic_vector.s,v 1.38 2003/11/03 21:34:45 jhb Exp $ + * $FreeBSD: src/sys/i386/isa/atpic_vector.s,v 1.39 2003/11/12 18:13:57 jhb Exp $ */ /* @@ -46,29 +46,10 @@ #include "assym.s" -#define IRQ_BIT(irq_num) (1 << ((irq_num) % 8)) -#define IRQ_BYTE(irq_num) ((irq_num) >> 3) - -#define ENABLE_ICU1 \ - movb $ICU_EOI,%al ; /* as soon as possible send EOI ... */ \ - outb %al,$IO_ICU1 /* ... to clear in service bit */ - -#define ENABLE_ICU1_AND_2 \ - movb $ICU_EOI,%al ; /* as above */ \ - outb %al,$IO_ICU2 ; /* but do second icu first ... */ \ - outb %al,$IO_ICU1 /* ... then first icu */ - /* * Macros for interrupt interrupt entry, call to handler, and exit. - * - * XXX Most of the parameters here are obsolete. Fix this when we're - * done. - * XXX we really shouldn't return via doreti if we just schedule the - * interrupt handler and don't run anything. We could just do an - * iret. FIXME. - * XXX move the mask, EOI and td_intr_nesting_level frobbing into C code. */ -#define INTR(irq_num, vec_name, icu, enable_icus, maybe_extra_ipending) \ +#define INTR(irq_num, vec_name) \ .text ; \ SUPERALIGN_TEXT ; \ IDTVEC(vec_name) ; \ @@ -91,12 +72,6 @@ movq %r13,TF_R13(%rsp) ; \ movq %r14,TF_R14(%rsp) ; \ movq %r15,TF_R15(%rsp) ; \ - maybe_extra_ipending ; \ - movb imen + IRQ_BYTE(irq_num),%al ; \ - orb $IRQ_BIT(irq_num),%al ; \ - movb %al,imen + IRQ_BYTE(irq_num) ; \ - outb %al,$icu+ICU_IMR_OFFSET ; \ - enable_icus ; \ FAKE_MCOUNT(13*4(%esp)) ; /* XXX late to avoid double count */ \ movq $irq_num, %rdi; /* pass the IRQ */ \ call atpic_sched_ithd ; \ @@ -104,22 +79,20 @@ jmp doreti MCOUNT_LABEL(bintr) -#define CLKINTR_PENDING movl $1,CNAME(clkintr_pending) -/* Threaded interrupts */ - INTR(0,atpic_intr0, IO_ICU1, ENABLE_ICU1, CLKINTR_PENDING) - INTR(1,atpic_intr1, IO_ICU1, ENABLE_ICU1,) - INTR(2,atpic_intr2, IO_ICU1, ENABLE_ICU1,) - INTR(3,atpic_intr3, IO_ICU1, ENABLE_ICU1,) - INTR(4,atpic_intr4, IO_ICU1, ENABLE_ICU1,) - INTR(5,atpic_intr5, IO_ICU1, ENABLE_ICU1,) - INTR(6,atpic_intr6, IO_ICU1, ENABLE_ICU1,) - INTR(7,atpic_intr7, IO_ICU1, ENABLE_ICU1,) - INTR(8,atpic_intr8, IO_ICU2, ENABLE_ICU1_AND_2,) - INTR(9,atpic_intr9, IO_ICU2, ENABLE_ICU1_AND_2,) - INTR(10,atpic_intr10, IO_ICU2, ENABLE_ICU1_AND_2,) - INTR(11,atpic_intr11, IO_ICU2, ENABLE_ICU1_AND_2,) - INTR(12,atpic_intr12, IO_ICU2, ENABLE_ICU1_AND_2,) - INTR(13,atpic_intr13, IO_ICU2, ENABLE_ICU1_AND_2,) - INTR(14,atpic_intr14, IO_ICU2, ENABLE_ICU1_AND_2,) - INTR(15,atpic_intr15, IO_ICU2, ENABLE_ICU1_AND_2,) + INTR(0, atpic_intr0) + INTR(1, atpic_intr1) + INTR(2, atpic_intr2) + INTR(3, atpic_intr3) + INTR(4, atpic_intr4) + INTR(5, atpic_intr5) + INTR(6, atpic_intr6) + INTR(7, atpic_intr7) + INTR(8, atpic_intr8) + INTR(9, atpic_intr9) + INTR(10, atpic_intr10) + INTR(11, atpic_intr11) + INTR(12, atpic_intr12) + INTR(13, atpic_intr13) + INTR(14, atpic_intr14) + INTR(15, atpic_intr15) MCOUNT_LABEL(eintr)