From owner-freebsd-amd64@FreeBSD.ORG Tue Jul 27 19:42:15 2010 Return-Path: Delivered-To: freebsd-amd64@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id C750E1065688; Tue, 27 Jul 2010 19:42:15 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from cyrus.watson.org (cyrus.watson.org [65.122.17.42]) by mx1.freebsd.org (Postfix) with ESMTP id 839978FC22; Tue, 27 Jul 2010 19:42:15 +0000 (UTC) Received: from bigwig.baldwin.cx (66.111.2.69.static.nyinternet.net [66.111.2.69]) by cyrus.watson.org (Postfix) with ESMTPSA id 16C2B46B2D; Tue, 27 Jul 2010 15:42:15 -0400 (EDT) Received: from jhbbsd.localnet (smtp.hudson-trading.com [209.249.190.9]) by bigwig.baldwin.cx (Postfix) with ESMTPSA id 6ACE88A03C; Tue, 27 Jul 2010 15:42:13 -0400 (EDT) From: John Baldwin To: Bruce Evans Date: Tue, 27 Jul 2010 15:40:30 -0400 User-Agent: KMail/1.13.5 (FreeBSD/7.3-CBSD-20100217; KDE/4.4.5; amd64; ; ) References: <201007270928.24959.jhb@freebsd.org> <20100728044151.Y1330@delplex.bde.org> In-Reply-To: <20100728044151.Y1330@delplex.bde.org> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Message-Id: <201007271540.30774.jhb@freebsd.org> X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.0.1 (bigwig.baldwin.cx); Tue, 27 Jul 2010 15:42:13 -0400 (EDT) X-Virus-Scanned: clamav-milter 0.95.1 at bigwig.baldwin.cx X-Virus-Status: Clean X-Spam-Status: No, score=-2.6 required=4.2 tests=AWL,BAYES_00 autolearn=ham version=3.2.5 X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on bigwig.baldwin.cx Cc: jkoshy@freebsd.org, freebsd-amd64@freebsd.org Subject: Re: PERFMON isn't operational on amd64 X-BeenThere: freebsd-amd64@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the AMD64 platform List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 27 Jul 2010 19:42:15 -0000 On Tuesday, July 27, 2010 3:06:50 pm Bruce Evans wrote: > On Tue, 27 Jul 2010, John Baldwin wrote: > > > On Tuesday, July 27, 2010 8:43:00 am pluknet wrote: > >> Hi. > >> > >> What is a status of "options PERFMON" on amd64? > >> ... > >> Looking at cvs I see amd64/include/perfmon.h was never here. > > > > PERFMON in general is obsoleted by hwpmc(4) which is far more useful and > > featureful. It should probably just be axed. > > Nothing should just be axed. > > hwpmc(4) is far too featureful for me, yet perfmon(4) still does things > for me that hwpmc cannot do: > - from userland, without using the library, try undocumented unnamed > counters. There are a few useful ones for k7. E.g.: > 0xc8 (k8-fr-retired-near-returns) and > 0xc9 (k8-fr-retired-near-returns-mispredicted) > are k8-only according to hwpmc and amd docs, but also work on my k7 > (after a 4-line fix for perfmon on kx). I believe this is not too terribly hard to fix. For the two above I think this will suffice (manpage would also need to be updated for a full patch): (I think the misordering in pmc_events.h is required to preserve userland ABI.) Index: hwpmc_amd.c =================================================================== --- hwpmc_amd.c (revision 210547) +++ hwpmc_amd.c (working copy) @@ -137,6 +137,8 @@ { PMC_EV_K7_RETIRED_TAKEN_BRANCHES_MISPREDICTED, 0xC5, 0 }, { PMC_EV_K7_RETIRED_FAR_CONTROL_TRANSFERS, 0xC6, 0 }, { PMC_EV_K7_RETIRED_RESYNC_BRANCHES, 0xC7, 0 }, + { PMC_EV_K7_RETIRED_NEAR_RETURNS, 0xC8, 0 }, + { PMC_EV_K7_RETIRED_NEAR_RETURNS_MISPREDICTED, 0xC9, 0 }, { PMC_EV_K7_INTERRUPTS_MASKED_CYCLES, 0xCD, 0 }, { PMC_EV_K7_INTERRUPTS_MASKED_WHILE_PENDING_CYCLES, 0xCE, 0 }, { PMC_EV_K7_HARDWARE_INTERRUPTS, 0xCF, 0 }, Index: pmc_events.h =================================================================== --- pmc_events.h (revision 210547) +++ pmc_events.h (working copy) @@ -74,10 +74,12 @@ __PMC_EV(K7, RETIRED_RESYNC_BRANCHES) \ __PMC_EV(K7, INTERRUPTS_MASKED_CYCLES) \ __PMC_EV(K7, INTERRUPTS_MASKED_WHILE_PENDING_CYCLES) \ -__PMC_EV(K7, HARDWARE_INTERRUPTS) +__PMC_EV(K7, HARDWARE_INTERRUPTS) \ +__PMC_EV(K7, RETIRED_NEAR_RETURNS) \ +__PMC_EV(K7, RETIRED_NEAR_RETURNS_MISPREDICTED) #define PMC_EV_K7_FIRST PMC_EV_K7_DC_ACCESSES -#define PMC_EV_K7_LAST PMC_EV_K7_HARDWARE_INTERRUPTS +#define PMC_EV_K7_LAST PMC_EV_K7_RETIRED_NEAR_RETURNS_MISPREDICTED /* > - in the kernel count, events at the level of individual functions, non- > statistically using high resolution kernel profiling. This may result > in more time spent counting than doing useful work, but provides > high resolution. I would rather us provide this via hwpmc(4). perfmon(4) does not support programmable events on modern Intel CPUs nor does it support non-x86 CPUs. -- John Baldwin