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Date:      Sun, 18 Dec 2016 14:54:20 +0000 (UTC)
From:      Emmanuel Vadot <manu@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r310229 - in head/sys: arm/at91 arm/broadcom/bcm2835 arm/freescale/vybrid arm/lpc arm/samsung/exynos arm/ti dev/spibus dev/xilinx mips/atheros mips/atheros/ar531x mips/mediatek mips/rt305x
Message-ID:  <201612181454.uBIEsKkd019602@repo.freebsd.org>

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Author: manu
Date: Sun Dec 18 14:54:20 2016
New Revision: 310229
URL: https://svnweb.freebsd.org/changeset/base/310229

Log:
  ofw_spi: Parse property for the SPI mode and CS polarity.
  As cs is stored in a uint32_t, use the last bit to store the
  active high flag as it's unlikely that we will have that much CS.
  
  Reviewed by:	loos
  MFC after:	2 weeks
  Differential Revision:	https://reviews.freebsd.org/D8614

Modified:
  head/sys/arm/at91/at91_spi.c
  head/sys/arm/broadcom/bcm2835/bcm2835_spi.c
  head/sys/arm/freescale/vybrid/vf_spi.c
  head/sys/arm/lpc/lpc_spi.c
  head/sys/arm/samsung/exynos/exynos5_spi.c
  head/sys/arm/ti/ti_spi.c
  head/sys/dev/spibus/ofw_spibus.c
  head/sys/dev/spibus/spibusvar.h
  head/sys/dev/xilinx/axi_quad_spi.c
  head/sys/mips/atheros/ar531x/ar5315_spi.c
  head/sys/mips/atheros/ar71xx_spi.c
  head/sys/mips/mediatek/mtk_spi_v1.c
  head/sys/mips/mediatek/mtk_spi_v2.c
  head/sys/mips/rt305x/rt305x_spi.c

Modified: head/sys/arm/at91/at91_spi.c
==============================================================================
--- head/sys/arm/at91/at91_spi.c	Sun Dec 18 14:31:11 2016	(r310228)
+++ head/sys/arm/at91/at91_spi.c	Sun Dec 18 14:54:20 2016	(r310229)
@@ -301,6 +301,8 @@ at91_spi_transfer(device_t dev, device_t
 	/* get the proper chip select */
 	spibus_get_cs(child, &cs);
 
+	cs &= ~SPIBUS_CS_HIGH;
+
 	sc = device_get_softc(dev);
 	i = 0;
 

Modified: head/sys/arm/broadcom/bcm2835/bcm2835_spi.c
==============================================================================
--- head/sys/arm/broadcom/bcm2835/bcm2835_spi.c	Sun Dec 18 14:31:11 2016	(r310228)
+++ head/sys/arm/broadcom/bcm2835/bcm2835_spi.c	Sun Dec 18 14:54:20 2016	(r310229)
@@ -433,6 +433,9 @@ bcm_spi_transfer(device_t dev, device_t 
 
 	/* Get the proper chip select for this child. */
 	spibus_get_cs(child, &cs);
+
+	cs &= ~SPIBUS_CS_HIGH;
+
 	if (cs > 2) {
 		device_printf(dev,
 		    "Invalid chip select %d requested by %s\n", cs,

Modified: head/sys/arm/freescale/vybrid/vf_spi.c
==============================================================================
--- head/sys/arm/freescale/vybrid/vf_spi.c	Sun Dec 18 14:31:11 2016	(r310228)
+++ head/sys/arm/freescale/vybrid/vf_spi.c	Sun Dec 18 14:54:20 2016	(r310229)
@@ -262,6 +262,8 @@ spi_transfer(device_t dev, device_t chil
 	/* get the proper chip select */
 	spibus_get_cs(child, &cs);
 
+	cs &= ~SPIBUS_CS_HIGH;
+
 	/* Command */
 	spi_txrx(sc, cmd->tx_cmd, cmd->rx_cmd, cmd->tx_cmd_sz, cs);
 

Modified: head/sys/arm/lpc/lpc_spi.c
==============================================================================
--- head/sys/arm/lpc/lpc_spi.c	Sun Dec 18 14:31:11 2016	(r310228)
+++ head/sys/arm/lpc/lpc_spi.c	Sun Dec 18 14:54:20 2016	(r310229)
@@ -147,6 +147,8 @@ lpc_spi_transfer(device_t dev, device_t 
 
 	spibus_get_cs(child, &cs);
 
+	cs &= ~SPIBUS_CS_HIGH;
+
 	/* Set CS active */
 	lpc_gpio_set_state(child, cs, 0);
 

Modified: head/sys/arm/samsung/exynos/exynos5_spi.c
==============================================================================
--- head/sys/arm/samsung/exynos/exynos5_spi.c	Sun Dec 18 14:31:11 2016	(r310228)
+++ head/sys/arm/samsung/exynos/exynos5_spi.c	Sun Dec 18 14:54:20 2016	(r310229)
@@ -204,6 +204,8 @@ spi_transfer(device_t dev, device_t chil
 	/* get the proper chip select */
 	spibus_get_cs(child, &cs);
 
+	cs &= ~SPIBUS_CS_HIGH;
+
 	/* Command */
 	spi_txrx(sc, cmd->tx_cmd, cmd->rx_cmd, cmd->tx_cmd_sz, cs);
 

Modified: head/sys/arm/ti/ti_spi.c
==============================================================================
--- head/sys/arm/ti/ti_spi.c	Sun Dec 18 14:31:11 2016	(r310228)
+++ head/sys/arm/ti/ti_spi.c	Sun Dec 18 14:54:20 2016	(r310229)
@@ -457,6 +457,9 @@ ti_spi_transfer(device_t dev, device_t c
 
 	/* Get the proper chip select for this child. */
 	spibus_get_cs(child, &cs);
+
+	cs &= ~SPIBUS_CS_HIGH;
+
 	if (cs > sc->sc_numcs) {
 		device_printf(dev, "Invalid chip select %d requested by %s\n",
 		    cs, device_get_nameunit(child));

Modified: head/sys/dev/spibus/ofw_spibus.c
==============================================================================
--- head/sys/dev/spibus/ofw_spibus.c	Sun Dec 18 14:31:11 2016	(r310228)
+++ head/sys/dev/spibus/ofw_spibus.c	Sun Dec 18 14:54:20 2016	(r310229)
@@ -80,6 +80,7 @@ ofw_spibus_attach(device_t dev)
 	phandle_t child;
 	pcell_t clock, paddr;
 	device_t childdev;
+	uint32_t mode = SPIBUS_MODE_NONE;
 
 	sc->dev = dev;
 
@@ -103,6 +104,24 @@ ofw_spibus_attach(device_t dev)
 		}
 
 		/*
+		 * Try to get the cpol/cpha mode
+		 */
+		if (OF_hasprop(child, "spi-cpol"))
+			mode = SPIBUS_MODE_CPOL;
+		if (OF_hasprop(child, "spi-cpha")) {
+			if (mode == SPIBUS_MODE_CPOL)
+				mode = SPIBUS_MODE_CPOL_CPHA;
+			else
+				mode = SPIBUS_MODE_CPHA;
+		}
+
+		/*
+		 * Try to get the CS polarity
+		 */
+		if (OF_hasprop(child, "spi-cs-high"))
+			paddr |= SPIBUS_CS_HIGH;
+
+		/*
 		 * Get the maximum clock frequency for device, zero means
 		 * use the default bus speed.
 		 */
@@ -120,6 +139,7 @@ ofw_spibus_attach(device_t dev)
 			continue;
 		dinfo->opd_dinfo.cs = paddr;
 		dinfo->opd_dinfo.clock = clock;
+		dinfo->opd_dinfo.mode = mode;
 		if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, child) !=
 		    0) {
 			free(dinfo, M_DEVBUF);

Modified: head/sys/dev/spibus/spibusvar.h
==============================================================================
--- head/sys/dev/spibus/spibusvar.h	Sun Dec 18 14:31:11 2016	(r310228)
+++ head/sys/dev/spibus/spibusvar.h	Sun Dec 18 14:54:20 2016	(r310229)
@@ -46,6 +46,8 @@ struct spibus_ivar
 	uint32_t	clock;
 };
 
+#define	SPIBUS_CS_HIGH	(1U << 31)
+
 enum {
 	SPIBUS_IVAR_CS,		/* chip select that we're on */
 	SPIBUS_IVAR_MODE,	/* SPI mode (0-3) */

Modified: head/sys/dev/xilinx/axi_quad_spi.c
==============================================================================
--- head/sys/dev/xilinx/axi_quad_spi.c	Sun Dec 18 14:31:11 2016	(r310228)
+++ head/sys/dev/xilinx/axi_quad_spi.c	Sun Dec 18 14:54:20 2016	(r310229)
@@ -193,6 +193,8 @@ spi_transfer(device_t dev, device_t chil
 	/* get the proper chip select */
 	spibus_get_cs(child, &cs);
 
+	cs &= ~SPIBUS_CS_HIGH;
+
 	/* Assert CS */
 	reg = READ4(sc, SPI_SSR);
 	reg &= ~(1 << cs);

Modified: head/sys/mips/atheros/ar531x/ar5315_spi.c
==============================================================================
--- head/sys/mips/atheros/ar531x/ar5315_spi.c	Sun Dec 18 14:31:11 2016	(r310228)
+++ head/sys/mips/atheros/ar531x/ar5315_spi.c	Sun Dec 18 14:54:20 2016	(r310229)
@@ -166,6 +166,8 @@ ar5315_spi_transfer(device_t dev, device
 
 	spibus_get_cs(child, &cs);
 
+	cs &= ~SPIBUS_CS_HIGH;
+
 	/* Open SPI controller interface */
 	ar5315_spi_chip_activate(sc, cs);
 

Modified: head/sys/mips/atheros/ar71xx_spi.c
==============================================================================
--- head/sys/mips/atheros/ar71xx_spi.c	Sun Dec 18 14:31:11 2016	(r310228)
+++ head/sys/mips/atheros/ar71xx_spi.c	Sun Dec 18 14:54:20 2016	(r310229)
@@ -212,6 +212,8 @@ ar71xx_spi_transfer(device_t dev, device
 
 	spibus_get_cs(child, &cs);
 
+	cs &= ~SPIBUS_CS_HIGH;
+
 	ar71xx_spi_chip_activate(sc, cs);
 
 	KASSERT(cmd->tx_cmd_sz == cmd->rx_cmd_sz, 

Modified: head/sys/mips/mediatek/mtk_spi_v1.c
==============================================================================
--- head/sys/mips/mediatek/mtk_spi_v1.c	Sun Dec 18 14:31:11 2016	(r310228)
+++ head/sys/mips/mediatek/mtk_spi_v1.c	Sun Dec 18 14:54:20 2016	(r310229)
@@ -231,6 +231,8 @@ mtk_spi_transfer(device_t dev, device_t 
 
 	spibus_get_cs(child, &cs);
 
+	cs &= ~SPIBUS_CS_HIGH;
+
 	if (cs != 0)
 		/* Only 1 CS */
 		return (ENXIO);

Modified: head/sys/mips/mediatek/mtk_spi_v2.c
==============================================================================
--- head/sys/mips/mediatek/mtk_spi_v2.c	Sun Dec 18 14:31:11 2016	(r310228)
+++ head/sys/mips/mediatek/mtk_spi_v2.c	Sun Dec 18 14:54:20 2016	(r310229)
@@ -236,6 +236,8 @@ mtk_spi_transfer(device_t dev, device_t 
 
 	spibus_get_cs(child, &cs);
 
+	cs &= ~SPIBUS_CS_HIGH;
+
 	if (cs != 0)
 		/* Only 1 CS */
 		return (ENXIO);

Modified: head/sys/mips/rt305x/rt305x_spi.c
==============================================================================
--- head/sys/mips/rt305x/rt305x_spi.c	Sun Dec 18 14:31:11 2016	(r310228)
+++ head/sys/mips/rt305x/rt305x_spi.c	Sun Dec 18 14:54:20 2016	(r310229)
@@ -226,6 +226,8 @@ rt305x_spi_transfer(device_t dev, device
 
 	spibus_get_cs(child, &cs);
 
+	cs &= ~SPIBUS_CS_HIGH;
+
 	if (cs != 0)
 		/* Only 1 CS */
 		return (ENXIO);



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