From owner-freebsd-security@freebsd.org Wed May 15 14:33:32 2019 Return-Path: Delivered-To: freebsd-security@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id E4A9D1593473 for ; Wed, 15 May 2019 14:33:31 +0000 (UTC) (envelope-from mike@sentex.net) Received: from pyroxene.sentex.ca (unknown [IPv6:2607:f3e0:0:3::18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "pyroxene.sentex.ca", Issuer "Let's Encrypt Authority X3" (not verified)) by mx1.freebsd.org (Postfix) with ESMTPS id 2748A8DCD1 for ; Wed, 15 May 2019 14:33:31 +0000 (UTC) (envelope-from mike@sentex.net) Received: from [192.168.43.29] ([192.168.43.29]) by pyroxene.sentex.ca (8.15.2/8.15.2) with ESMTPS id x4FEXRSW049234 (version=TLSv1.2 cipher=AES128-SHA bits=128 verify=NO); Wed, 15 May 2019 10:33:28 -0400 (EDT) (envelope-from mike@sentex.net) Subject: Re: [FreeBSD-Announce] FreeBSD Security Advisory FreeBSD-SA-19:07.mds To: Borja Marcos Cc: "Wall, Stephen" , "freebsd-security@freebsd.org" References: <20190515000302.44CBB1AB79@freefall.freebsd.org> <31b178d5-9998-d2a3-cc4c-d3f7d574743a@sentex.net> From: mike tancsa Message-ID: <40f27bee-caa2-75a7-459d-3491ff22ebfb@sentex.net> Date: Wed, 15 May 2019 10:33:28 -0400 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Content-Language: en-US X-Rspamd-Queue-Id: 2748A8DCD1 X-Spamd-Bar: - Authentication-Results: mx1.freebsd.org; spf=pass (mx1.freebsd.org: domain of mike@sentex.net designates 2607:f3e0:0:3::18 as permitted sender) smtp.mailfrom=mike@sentex.net X-Spamd-Result: default: False [-1.42 / 15.00]; ARC_NA(0.00)[]; TO_DN_EQ_ADDR_SOME(0.00)[]; RCVD_TLS_ALL(0.00)[]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_THREE(0.00)[3]; R_SPF_ALLOW(-0.20)[+ip6:2607:f3e0::/32]; NEURAL_HAM_LONG(-1.00)[-0.998,0]; MIME_GOOD(-0.10)[text/plain]; DMARC_NA(0.00)[sentex.net]; RDNS_NONE(1.00)[]; TO_DN_SOME(0.00)[]; TO_MATCH_ENVRCPT_SOME(0.00)[]; MX_GOOD(-0.01)[cached: smtp.sentex.ca]; NEURAL_HAM_SHORT(-0.90)[-0.902,0]; NEURAL_HAM_MEDIUM(-0.98)[-0.983,0]; IP_SCORE(-1.73)[ipnet: 2607:f3e0::/32(-4.95), asn: 11647(-3.59), country: CA(-0.09)]; FROM_EQ_ENVFROM(0.00)[]; R_DKIM_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:11647, ipnet:2607:f3e0::/32, country:CA]; HFILTER_HOSTNAME_UNKNOWN(2.50)[]; MID_RHS_MATCH_FROM(0.00)[]; RCVD_COUNT_TWO(0.00)[2] X-BeenThere: freebsd-security@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "Security issues \[members-only posting\]" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 15 May 2019 14:33:32 -0000 On 5/15/2019 10:27 AM, Borja Marcos wrote: > >> On 15 May 2019, at 15:32, mike tancsa wrote: >> >> Actually, just tried this on RELENG_11 (r347613) and I get >> >> don't know how to load module '/boot/firmware/intel-ucode.bin' >> >> In boot/loader.conf I have >> >> cpu_microcode_load=3D"YES" >> cpu_microcode_name=3D"/boot/firmware/intel-ucode.bin=E2=80=9D > I used this: > microcode_update_enable=3D=E2=80=9CYES" > > > on /etc/rc.conf with the devcpu-data port installed and as far as I kno= w it updated the microcode. > > The script in /usr/local/etc/rc.d used cpucontrol(8) to load it. > > Or am I holding it wrong?=20 Supposedly 2 ways to do it. When you install the port, it writes .... and I missed the part where it says running FreeBSD 12.0.... --------------------- Installing this port will allow host startup to update the CPU microcode = on a FreeBSD system automatically.=C2=A0 There are two methods for updating = CPU microcode: the first methods loads and applies the update before the kern= el begins booting, and the second method loads and applies updates using an rc script.=C2=A0 The first method is preferred, but is currently only sup= ported on Intel i386 and amd64 processors running FreeBSD 12.0.=C2=A0 It is safe= to enable both methods. The first method ensures that any CPU features introduced by a microcode update are visible to the kernel.=C2=A0 In other words, the update is loa= ded before the kernel performs CPU feature detection. To enable updates using the first method, add the following lines to the system's /boot/loader.conf: cpu_microcode_load=3D"YES" cpu_microcode_name=3D"/boot/firmware/intel-ucode.bin" =C2=A0=C2=A0=C2=A0 ---Mike > > > Borja. > >