From owner-svn-src-all@FreeBSD.ORG Mon Mar 2 20:42:08 2015 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id AB2C771C; Mon, 2 Mar 2015 20:42:08 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 9537C26F; Mon, 2 Mar 2015 20:42:08 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id t22Kg8ek085426; Mon, 2 Mar 2015 20:42:08 GMT (envelope-from hselasky@FreeBSD.org) Received: (from hselasky@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id t22Kg7eA085420; Mon, 2 Mar 2015 20:42:07 GMT (envelope-from hselasky@FreeBSD.org) Message-Id: <201503022042.t22Kg7eA085420@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: hselasky set sender to hselasky@FreeBSD.org using -f From: Hans Petter Selasky Date: Mon, 2 Mar 2015 20:42:07 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r279544 - in head/sys: arm/samsung/exynos dev/usb/controller X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 02 Mar 2015 20:42:08 -0000 Author: hselasky Date: Mon Mar 2 20:42:06 2015 New Revision: 279544 URL: https://svnweb.freebsd.org/changeset/base/279544 Log: Add quirk to disable 64-bit XHCI DMA after r276717. Requested by: Gary Jennejohn MFC after: 3 days Modified: head/sys/arm/samsung/exynos/exynos5_xhci.c head/sys/dev/usb/controller/xhci.c head/sys/dev/usb/controller/xhci.h head/sys/dev/usb/controller/xhci_pci.c Modified: head/sys/arm/samsung/exynos/exynos5_xhci.c ============================================================================== --- head/sys/arm/samsung/exynos/exynos5_xhci.c Mon Mar 2 20:40:25 2015 (r279543) +++ head/sys/arm/samsung/exynos/exynos5_xhci.c Mon Mar 2 20:42:06 2015 (r279544) @@ -239,7 +239,7 @@ exynos_xhci_attach(device_t dev) return (ENXIO); } - if (xhci_init(&esc->base, dev)) { + if (xhci_init(&esc->base, dev, 0)) { device_printf(dev, "Could not initialize softc\n"); bus_release_resources(dev, exynos_xhci_spec, esc->res); return (ENXIO); Modified: head/sys/dev/usb/controller/xhci.c ============================================================================== --- head/sys/dev/usb/controller/xhci.c Mon Mar 2 20:40:25 2015 (r279543) +++ head/sys/dev/usb/controller/xhci.c Mon Mar 2 20:42:06 2015 (r279544) @@ -97,15 +97,19 @@ SYSCTL_INT(_hw_usb_xhci, OID_AUTO, strea static int xhcidebug; static int xhciroute; static int xhcipolling; +static int xhcidma32; SYSCTL_INT(_hw_usb_xhci, OID_AUTO, debug, CTLFLAG_RWTUN, &xhcidebug, 0, "Debug level"); SYSCTL_INT(_hw_usb_xhci, OID_AUTO, xhci_port_route, CTLFLAG_RWTUN, - &xhciroute, 0, "Routing bitmap for switching EHCI ports to XHCI controller"); + &xhciroute, 0, "Routing bitmap for switching EHCI ports to the XHCI controller"); SYSCTL_INT(_hw_usb_xhci, OID_AUTO, use_polling, CTLFLAG_RWTUN, - &xhcipolling, 0, "Set to enable software interrupt polling for XHCI controller"); + &xhcipolling, 0, "Set to enable software interrupt polling for the XHCI controller"); +SYSCTL_INT(_hw_usb_xhci, OID_AUTO, dma32, CTLFLAG_RWTUN, + &xhcidma32, 0, "Set to only use 32-bit DMA for the XHCI controller"); #else #define xhciroute 0 +#define xhcidma32 0 #endif #define XHCI_INTR_ENDPT 1 @@ -576,7 +580,7 @@ xhci_halt_controller(struct xhci_softc * } usb_error_t -xhci_init(struct xhci_softc *sc, device_t self) +xhci_init(struct xhci_softc *sc, device_t self, uint8_t dma32) { uint32_t temp; @@ -623,7 +627,8 @@ xhci_init(struct xhci_softc *sc, device_ } /* get DMA bits */ - sc->sc_bus.dma_bits = XHCI_HCS0_AC64(temp) ? 64 : 32; + sc->sc_bus.dma_bits = (XHCI_HCS0_AC64(temp) && + xhcidma32 == 0 && dma32 == 0) ? 64 : 32; device_printf(self, "%d bytes context size, %d-bit DMA\n", sc->sc_ctx_is_64_byte ? 64 : 32, (int)sc->sc_bus.dma_bits); Modified: head/sys/dev/usb/controller/xhci.h ============================================================================== --- head/sys/dev/usb/controller/xhci.h Mon Mar 2 20:40:25 2015 (r279543) +++ head/sys/dev/usb/controller/xhci.h Mon Mar 2 20:42:06 2015 (r279544) @@ -522,7 +522,7 @@ struct xhci_softc { uint8_t xhci_use_polling(void); usb_error_t xhci_halt_controller(struct xhci_softc *); -usb_error_t xhci_init(struct xhci_softc *, device_t); +usb_error_t xhci_init(struct xhci_softc *, device_t, uint8_t); usb_error_t xhci_start_controller(struct xhci_softc *); void xhci_interrupt(struct xhci_softc *); void xhci_uninit(struct xhci_softc *); Modified: head/sys/dev/usb/controller/xhci_pci.c ============================================================================== --- head/sys/dev/usb/controller/xhci_pci.c Mon Mar 2 20:40:25 2015 (r279543) +++ head/sys/dev/usb/controller/xhci_pci.c Mon Mar 2 20:42:06 2015 (r279544) @@ -192,7 +192,7 @@ xhci_pci_attach(device_t self) sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); sc->sc_io_size = rman_get_size(sc->sc_io_res); - if (xhci_init(sc, self)) { + if (xhci_init(sc, self, 0)) { device_printf(self, "Could not initialize softc\n"); bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, sc->sc_io_res);