From owner-svn-src-all@freebsd.org Wed Jun 8 02:37:25 2016 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 1738CB6DC5A; Wed, 8 Jun 2016 02:37:25 +0000 (UTC) (envelope-from kevlo@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id BFA131678; Wed, 8 Jun 2016 02:37:24 +0000 (UTC) (envelope-from kevlo@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id u582bNnT087017; Wed, 8 Jun 2016 02:37:23 GMT (envelope-from kevlo@FreeBSD.org) Received: (from kevlo@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id u582bNgS087015; Wed, 8 Jun 2016 02:37:23 GMT (envelope-from kevlo@FreeBSD.org) Message-Id: <201606080237.u582bNgS087015@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: kevlo set sender to kevlo@FreeBSD.org using -f From: Kevin Lo Date: Wed, 8 Jun 2016 02:37:23 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r301575 - head/sys/dev/ral X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Jun 2016 02:37:25 -0000 Author: kevlo Date: Wed Jun 8 02:37:23 2016 New Revision: 301575 URL: https://svnweb.freebsd.org/changeset/base/301575 Log: - Replace the magic numbers with something more readable. - Reset DMA indexes after disabling DMA. Modified: head/sys/dev/ral/rt2860.c head/sys/dev/ral/rt2860reg.h Modified: head/sys/dev/ral/rt2860.c ============================================================================== --- head/sys/dev/ral/rt2860.c Wed Jun 8 02:14:05 2016 (r301574) +++ head/sys/dev/ral/rt2860.c Wed Jun 8 02:37:23 2016 (r301575) @@ -900,7 +900,7 @@ rt2860_ampdu_rx_stop(struct ieee80211com } #endif -int +static int rt2860_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) { struct rt2860_vap *rvp = RT2860_VAP(vap); @@ -3824,9 +3824,16 @@ rt2860_init_locked(struct rt2860_softc * /* disable DMA */ tmp = RAL_READ(sc, RT2860_WPDMA_GLO_CFG); - tmp &= 0xff0; + tmp &= ~(RT2860_RX_DMA_BUSY | RT2860_RX_DMA_EN | RT2860_TX_DMA_BUSY | + RT2860_TX_DMA_EN); + tmp |= RT2860_TX_WB_DDONE; RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp); + /* reset DMA indexes */ + RAL_WRITE(sc, RT2860_WPDMA_RST_IDX, RT2860_RST_DRX_IDX0 | + RT2860_RST_DTX_IDX5 | RT2860_RST_DTX_IDX4 | RT2860_RST_DTX_IDX3 | + RT2860_RST_DTX_IDX2 | RT2860_RST_DTX_IDX1 | RT2860_RST_DTX_IDX0); + /* PBF hardware reset */ RAL_WRITE(sc, RT2860_SYS_CTRL, 0xe1f); RAL_BARRIER_WRITE(sc); @@ -3858,7 +3865,9 @@ rt2860_init_locked(struct rt2860_softc * rt2860_stop_locked(sc); return; } - tmp &= 0xff0; + tmp &= ~(RT2860_RX_DMA_BUSY | RT2860_RX_DMA_EN | RT2860_TX_DMA_BUSY | + RT2860_TX_DMA_EN); + tmp |= RT2860_TX_WB_DDONE; RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp); /* reset Rx ring and all 6 Tx rings */ @@ -3958,7 +3967,9 @@ rt2860_init_locked(struct rt2860_softc * rt2860_stop_locked(sc); return; } - tmp &= 0xff0; + tmp &= ~(RT2860_RX_DMA_BUSY | RT2860_RX_DMA_EN | RT2860_TX_DMA_BUSY | + RT2860_TX_DMA_EN); + tmp |= RT2860_TX_WB_DDONE; RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp); /* disable interrupts mitigation */ Modified: head/sys/dev/ral/rt2860reg.h ============================================================================== --- head/sys/dev/ral/rt2860reg.h Wed Jun 8 02:14:05 2016 (r301574) +++ head/sys/dev/ral/rt2860reg.h Wed Jun 8 02:37:23 2016 (r301575) @@ -257,6 +257,15 @@ #define RT2860_TX_DMA_BUSY (1 << 1) #define RT2860_TX_DMA_EN (1 << 0) +/* flags for register WPDMA_RST_IDX */ +#define RT2860_RST_DRX_IDX0 (1 << 16) +#define RT2860_RST_DTX_IDX5 (1 << 5) +#define RT2860_RST_DTX_IDX4 (1 << 4) +#define RT2860_RST_DTX_IDX3 (1 << 3) +#define RT2860_RST_DTX_IDX2 (1 << 2) +#define RT2860_RST_DTX_IDX1 (1 << 1) +#define RT2860_RST_DTX_IDX0 (1 << 0) + /* possible flags for register DELAY_INT_CFG */ #define RT2860_TXDLY_INT_EN (1U << 31) #define RT2860_TXMAX_PINT_SHIFT 24 @@ -1233,7 +1242,7 @@ static const struct rt2860_rate { { 20, 0xba }, \ { 21, 0xdb }, \ { 24, 0x16 }, \ - { 25, 0x01 }, \ + { 25, 0x03 }, \ { 29, 0x1f } #define RT5390_DEF_RF \