From owner-freebsd-hackers Tue May 14 08:21:19 1996 Return-Path: owner-hackers Received: (from root@localhost) by freefall.freebsd.org (8.7.3/8.7.3) id IAA17258 for hackers-outgoing; Tue, 14 May 1996 08:21:19 -0700 (PDT) Received: from Root.COM (implode.Root.COM [198.145.90.17]) by freefall.freebsd.org (8.7.3/8.7.3) with ESMTP id IAA17239; Tue, 14 May 1996 08:21:11 -0700 (PDT) Received: from localhost (localhost [127.0.0.1]) by Root.COM (8.7.5/8.6.5) with SMTP id IAA12912; Tue, 14 May 1996 08:14:39 -0700 (PDT) Message-Id: <199605141514.IAA12912@Root.COM> X-Authentication-Warning: implode.Root.COM: Host localhost [127.0.0.1] didn't use HELO protocol To: "matthew c. mead" cc: joerg_wunsch@uriah.heep.sax.de, blh@nol.net, jgreco@brasil.moneng.mei.com, hackers@freebsd.org, hardware@freebsd.org Subject: Re: Triton chipset with 256k cache caches 32M only? In-reply-to: Your message of "Tue, 14 May 1996 09:13:28 EDT." <199605141313.JAA07905@Glock.COM> From: David Greenman Reply-To: davidg@Root.COM Date: Tue, 14 May 1996 08:14:38 -0700 Sender: owner-hackers@freebsd.org X-Loop: FreeBSD.org Precedence: bulk >J Wunsch writes: > >> As Brett L. Hawn wrote: > >> > I would highly suggest getting some of the new >> > ASUS (just my particular favorite) tr-2 chipset motherboards, these solve >> > the caching problem along with many of the other inherent bugs of tr-1 >> > chipsets. > >> They even can do ECC now if you're using parity SIMMs! > >> (About to get my new board into service by tomorrow or thursday. :) > > I'd really like to do ECC, I just don't have the money for it right >now. So does this ECC work the same as the ECC on DEC Alphas? On the Alphas, >you put in 5M for every 4M of addressable ram. Is there a fifth simm slot on >these motherboards where a non ECC capable motherboard would have 4? No, it uses the parity bits. Only 8 syndrome bits are needed for 64bit words. -DG David Greenman Core-team/Principal Architect, The FreeBSD Project