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Date:      Sun, 2 Sep 2012 04:56:29 +0000 (UTC)
From:      Adrian Chadd <adrian@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r240001 - head/sys/dev/ath/ath_hal/ar5212
Message-ID:  <201209020456.q824uTdv041040@svn.freebsd.org>

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Author: adrian
Date: Sun Sep  2 04:56:29 2012
New Revision: 240001
URL: http://svn.freebsd.org/changeset/base/240001

Log:
  AR5212 radar pulse fixes.
  
  Fix the strong signal diversity capability setting - I had totally
  messed up the indentation.
  
  Set the default values to match what's in the .ini for now, rather than
  what values I had previously gleaned from places.  This seems to work
  quite well for the early AR5212 NICs I have.  Of course, later NICs
  have different PHYs and the radar configuration is very card/board
  dependent..
  
  Tested:
  
   * ath1: AR5212 mac 5.3 RF5111 phy 4.1
     ath1: 2GHz radio: 0x0023; 5GHz radio: 0x0017
  
  This detects 1, 5, 25, 50, 75, 100uS pulses reliably (with no interference.)
  
  However, 10uS pulses don't detect reliably. That may be around the
  transition between short and long pulses so some further tuning may
  improve things.

Modified:
  head/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c

Modified: head/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c	Sun Sep  2 04:39:07 2012	(r240000)
+++ head/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c	Sun Sep  2 04:56:29 2012	(r240001)
@@ -960,13 +960,13 @@ ar5212SetCapability(struct ath_hal *ah, 
 		case 1:	/* setting */
 			if (ahp->ah_phyPowerOn) {
 				if (capability == HAL_CAP_STRONG_DIV) {
-							}
-				v = OS_REG_READ(ah, AR_PHY_CCK_DETECT);
-				if (setting)
-					v |= AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
-				else
-					v &= ~AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
-				OS_REG_WRITE(ah, AR_PHY_CCK_DETECT, v);
+					v = OS_REG_READ(ah, AR_PHY_CCK_DETECT);
+					if (setting)
+						v |= AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
+					else
+						v &= ~AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
+					OS_REG_WRITE(ah, AR_PHY_CCK_DETECT, v);
+				}
 			}
 			ahp->ah_diversity = (setting != 0);
 			return AH_TRUE;
@@ -1243,11 +1243,11 @@ ar5212EnableDfs(struct ath_hal *ah, HAL_
 /*
  * Parameters for the AR5212 PHY.
  */
-#define	AR5212_DFS_FIRPWR	-41
-#define	AR5212_DFS_RRSSI	12
-#define	AR5212_DFS_HEIGHT	20
-#define	AR5212_DFS_PRSSI	22
-#define	AR5212_DFS_INBAND	6
+#define	AR5212_DFS_FIRPWR	-35
+#define	AR5212_DFS_RRSSI	20
+#define	AR5212_DFS_HEIGHT	14
+#define	AR5212_DFS_PRSSI	6
+#define	AR5212_DFS_INBAND	4
 
 /*
  * Default parameters for the AR5413 PHY.
@@ -1261,7 +1261,6 @@ ar5212EnableDfs(struct ath_hal *ah, HAL_
 #define	AR5413_DFS_RELSTEP	31
 #define	AR5413_DFS_MAXLEN	255
 
-
 HAL_BOOL
 ar5212GetDfsDefaultThresh(struct ath_hal *ah, HAL_PHYERR_PARAM *pe)
 {



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