From owner-svn-src-user@FreeBSD.ORG Tue May 10 12:11:30 2011 Return-Path: Delivered-To: svn-src-user@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 91B931065670 for ; Tue, 10 May 2011 12:11:30 +0000 (UTC) (envelope-from avg@FreeBSD.org) Received: from citadel.icyb.net.ua (citadel.icyb.net.ua [212.40.38.140]) by mx1.freebsd.org (Postfix) with ESMTP id D802B8FC1B for ; Tue, 10 May 2011 12:11:29 +0000 (UTC) Received: from odyssey.starpoint.kiev.ua (alpha-e.starpoint.kiev.ua [212.40.38.101]) by citadel.icyb.net.ua (8.8.8p3/ICyb-2.3exp) with ESMTP id OAA13215; Tue, 10 May 2011 14:56:50 +0300 (EEST) (envelope-from avg@FreeBSD.org) Message-ID: <4DC92802.6040906@FreeBSD.org> Date: Tue, 10 May 2011 14:56:50 +0300 From: Andriy Gapon User-Agent: Mozilla/5.0 (X11; U; FreeBSD amd64; en-US; rv:1.9.2.17) Gecko/20110504 Lightning/1.0b2 Thunderbird/3.1.10 MIME-Version: 1.0 To: Marcel Moolenaar References: <201105090705.p49756Ff080416@svn.freebsd.org> In-Reply-To: X-Enigmail-Version: 1.1.2 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Cc: src-committers@FreeBSD.org, svn-src-user@FreeBSD.org Subject: Re: svn commit: r221677 - in user/avg/xcpu/sys: amd64/amd64 kern sys X-BeenThere: svn-src-user@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the experimental " user" src tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 10 May 2011 12:11:30 -0000 on 10/05/2011 04:21 Marcel Moolenaar said the following: > > On May 9, 2011, at 12:05 AM, Andriy Gapon wrote: > >> Author: avg >> Date: Mon May 9 07:05:06 2011 >> New Revision: 221677 >> URL: http://svn.freebsd.org/changeset/base/221677 >> >> Log: >> re-implement hard stopping of CPUs and use it enforce panic(9) context > > While you're here... > > I'd like to change the whole logic and turn it into a > rendezvous. One CPU, the one panicing can proceed. But > I'd like to add the ability from the debugger to switch > onto a different CPU. Such makes it possible to implement > commands that show control and status registers, perform > function calls on specific CPUs, as well as dump on-chip > TLB entries and cache line contents if the CPU/platform > supports it. > > Thoughts? I think that this is implemented in (Open)Solaris and it's quite a simple implementation. Slave CPUs just spin in a stop loop checking for commands from a master CPU. This could be called a form of a rendezvous, but I'd prefer to not mix these concepts (i.e. hardstop/kdb case with normal rendezvous mechanism). In fact, we already have this approach implemented in the simplest, most trivial form - currently supported commands are: (1) restart (exit the spin loop); (2) reset system (effective only on BSP). The commands are all broadcast at the moment. We could add other meaningful commands (e.g. become a new master) quite easily IMO and make the commands targeted (i.e. add an ability to specify a subset of CPUs that should execute a command). -- Andriy Gapon