From nobody Wed Oct 25 00:41:52 2023 X-Original-To: dev-commits-src-branches@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4SFVVn3T5vz4xkQv; Wed, 25 Oct 2023 00:41:53 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4SFVVn0dSMz3SWd; Wed, 25 Oct 2023 00:41:53 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1698194513; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=E2akLibrfRmmfyBVR1+uhAAmEjAc0x1dC0JYUvwIQNs=; b=j/CshuwB7trdTD3bAz+MJKI3obPji4uiwCTPKVux3f+YXsRbAiwuMURiBS0qkOKloWWca3 RPP3ckQHfZ51r+6rPV0gyxhwe6PamM8CO5NEePpWQ+4QzP6PJaBDuL52/nt+Uay2R7R78L e4kL9nXI+TF38rnQMnQvM3rkOoQUQswj7o631+vhXRuUKfrVg3EYWTZvJXLq50gVM6YPoC s9At9HPFNrxZT9SCY0wsZX4j/R7QGxuOTF25J0R5G/jvU4xh3ENMtF3192JpSL3jUfgu/F ygWu1f/v2ELpvZ6uz1yrs0732fLh9ibDbPB1ms2kPZSt1SFGcG7nZVM+COj2TQ== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1698194513; a=rsa-sha256; cv=none; b=cyZufYx1x0hq0tkLC8SZ91vvTG5APhACBMKd4ErfcXuH60s06awtcWkyRQzOvpoK0u0YQU leC3aOaaNr0vdTbo8eKD+YoWCQAXWH74ab4JU23up/ANnRuwv9Wv6mDoPZjHqaK3UPVZxm nQ1yRdZ6wmYVOxLaYIglIwsf9OUMHyxrhoiK58PMaXwLPRl2zdcI2JF+6ltnsS3mK6jejZ phNn30huuaZQM3sM2W78Vv6YiGPSj7UwZSQcO4qVXVE/bNpHwsYaUo+kXzMz/saqWpiqfh CNzh9I5eKnznCqxiMfUqFeg5h0UtLgqkkWy2+ygF20oSrCtHQzcvl9LIEKBvjw== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1698194513; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=E2akLibrfRmmfyBVR1+uhAAmEjAc0x1dC0JYUvwIQNs=; b=hdlfj8kiHAbnQ+EAakA1Ng6IVqMAzl0q8ofKu0qJJMibSOqKBbhA1fUGyYNTRVZ+fN0epf BYrZJcyNaWeVGp5/ch2KusWJDY/vWSJfsd52ZprH7vPDUKbU6vdAwlTgyKigS4a0gFq8NC adVNHjgbZ/Gkgnv5H2S1asZbDwbhZppRnsc+jSDuhH7MnM7U7nLd89iklxYqP9r5DhnuR8 Cc0OeG3m+mdFAGAfyXurXeOXQS2aDZelLtfb4pxkOK70ANTgPLdjz6TdKyjMYsjPXbh8VK h9VyaNaz1VKaHiIXzhLdUVcDWXwigjqNnGEpvMQnptC6cTwYcUM7kVm1Y5Uniw== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4SFVVm6rcqzkmg; Wed, 25 Oct 2023 00:41:52 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.17.1/8.17.1) with ESMTP id 39P0fqZ2006031; Wed, 25 Oct 2023 00:41:52 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.17.1/8.17.1/Submit) id 39P0fqQ8006028; Wed, 25 Oct 2023 00:41:52 GMT (envelope-from git) Date: Wed, 25 Oct 2023 00:41:52 GMT Message-Id: <202310250041.39P0fqQ8006028@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: John Baldwin Subject: git: 472d697e556c - releng/14.0 - x86 msi: Enable/disable IDT vectors for MSI groups all at once List-Id: Commits to the stable branches of the FreeBSD src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-branches List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-branches@freebsd.org X-BeenThere: dev-commits-src-branches@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: jhb X-Git-Repository: src X-Git-Refname: refs/heads/releng/14.0 X-Git-Reftype: branch X-Git-Commit: 472d697e556cf8b8c37b70c255f6be3ed9d02241 Auto-Submitted: auto-generated The branch releng/14.0 has been updated by jhb: URL: https://cgit.FreeBSD.org/src/commit/?id=472d697e556cf8b8c37b70c255f6be3ed9d02241 commit 472d697e556cf8b8c37b70c255f6be3ed9d02241 Author: John Baldwin AuthorDate: 2023-10-20 21:52:38 +0000 Commit: John Baldwin CommitDate: 2023-10-24 19:30:26 +0000 x86 msi: Enable/disable IDT vectors for MSI groups all at once Unlike MSI-X, when a device uses multiple MSI interrupts, the entire group of interrupts are enabled/disabled at once in the relevant PCI config register. Currently, the interrupt code enables the IDT vector for each MSI interrupt when a handler is first registered. If the PCI device triggers an MSI interrupt which doesn't yet have a handler, this can trigger a panic when the Xrsvd ISR executes rather than treating it as a stray device interrupt. To fix, enable all the IDT vectors for an MSI group when the first interrupt handler is configured, and don't disable the IDT vectors until the last interrupt handler for the group is torn down. When migrating an MSI group between CPUs, enable/disable the entire group of IDT vectors if at least one interrupt handler is configured for the group. Reported by: jhay Reviewed by: kib Differential Revision: https://reviews.freebsd.org/D42232 (cherry picked from commit 2d4924892144f653a7a7afba27ed1bf536dd7e51) (cherry picked from commit 0e496388ef1bc9001378201bf8af2115d8739500) Approved by: re (gjb) --- sys/x86/x86/msi.c | 34 ++++++++++++++++++++-------------- 1 file changed, 20 insertions(+), 14 deletions(-) diff --git a/sys/x86/x86/msi.c b/sys/x86/x86/msi.c index 7f4d87c09453..246645efbc10 100644 --- a/sys/x86/x86/msi.c +++ b/sys/x86/x86/msi.c @@ -120,6 +120,7 @@ struct msi_intsrc { u_int msi_cpu; /* Local APIC ID. (g) */ u_int msi_count:8; /* Messages in this group. (g) */ u_int msi_maxcount:8; /* Alignment for this group. (g) */ + u_int msi_enabled:8; /* Enabled messages in this group. (g) */ u_int *msi_irqs; /* Group's IRQ list. (g) */ u_int msi_remap_cookie; }; @@ -204,7 +205,12 @@ msi_enable_intr(struct intsrc *isrc) { struct msi_intsrc *msi = (struct msi_intsrc *)isrc; - apic_enable_vector(msi->msi_cpu, msi->msi_vector); + msi = msi->msi_first; + if (msi->msi_enabled == 0) { + for (u_int i = 0; i < msi->msi_count; i++) + apic_enable_vector(msi->msi_cpu, msi->msi_vector + i); + } + msi->msi_enabled++; } static void @@ -212,7 +218,12 @@ msi_disable_intr(struct intsrc *isrc) { struct msi_intsrc *msi = (struct msi_intsrc *)isrc; - apic_disable_vector(msi->msi_cpu, msi->msi_vector); + msi = msi->msi_first; + msi->msi_enabled--; + if (msi->msi_enabled == 0) { + for (u_int i = 0; i < msi->msi_count; i++) + apic_disable_vector(msi->msi_cpu, msi->msi_vector + i); + } } static int @@ -277,11 +288,8 @@ msi_assign_cpu(struct intsrc *isrc, u_int apic_id) /* Must be set before BUS_REMAP_INTR as it may call back into MSI. */ msi->msi_cpu = apic_id; msi->msi_vector = vector; - if (msi->msi_intsrc.is_handlers > 0) - apic_enable_vector(msi->msi_cpu, msi->msi_vector); - for (i = 1; i < msi->msi_count; i++) { - sib = (struct msi_intsrc *)intr_lookup_source(msi->msi_irqs[i]); - if (sib->msi_intsrc.is_handlers > 0) + if (msi->msi_enabled > 0) { + for (i = 0; i < msi->msi_count; i++) apic_enable_vector(apic_id, vector + i); } error = BUS_REMAP_INTR(device_get_parent(msi->msi_dev), msi->msi_dev, @@ -317,15 +325,13 @@ msi_assign_cpu(struct intsrc *isrc, u_int apic_id) * to prevent races where we could miss an interrupt. If BUS_REMAP_INTR * failed then we disable and free the new, unused vector(s). */ - if (msi->msi_intsrc.is_handlers > 0) - apic_disable_vector(old_id, old_vector); - apic_free_vector(old_id, old_vector, msi->msi_irq); - for (i = 1; i < msi->msi_count; i++) { - sib = (struct msi_intsrc *)intr_lookup_source(msi->msi_irqs[i]); - if (sib->msi_intsrc.is_handlers > 0) + if (msi->msi_enabled > 0) { + for (i = 0; i < msi->msi_count; i++) apic_disable_vector(old_id, old_vector + i); - apic_free_vector(old_id, old_vector + i, msi->msi_irqs[i]); } + apic_free_vector(old_id, old_vector, msi->msi_irq); + for (i = 1; i < msi->msi_count; i++) + apic_free_vector(old_id, old_vector + i, msi->msi_irqs[i]); return (error); }