Date: Wed, 4 Jun 1997 18:45:09 +0200 From: Stefan Esser <se@FreeBSD.ORG> To: John-Mark Gurney <gurney_j@resnet.uoregon.edu> Cc: Richard Straka <straka@inficad.com>, current@FreeBSD.ORG Subject: Re: sio driver performance Message-ID: <19970604184509.28739@mi.uni-koeln.de> In-Reply-To: <19970604014135.27671@hydrogen.nike.efn.org>; from John-Mark Gurney on Wed, Jun 04, 1997 at 01:41:35AM -0700 References: <Pine.BSI.3.95.970604001520.15234B-100000@user2.inficad.com> <19970604014135.27671@hydrogen.nike.efn.org>
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On Jun 4, John-Mark Gurney <jmg@hydrogen.nike.efn.org> wrote:
> Richard Straka scribbled this message on Jun 4:
> > I have 2 16550A UARTS in a 486DX-33. During probing, the sio
> > driver properly identifies both ports as 16550A's.
> >
> > When sending sustained 115200 baud data from this machine, systat
> > (with vmstat option) indicates an interrupt rate of about 720/sec
> > with about 2% of the processor servicing interrupts.
> >
> > When receiving sustained 115200 baud data, an interrupt rate of
> > over 26,000/sec is indicated with about 15% of the processor going
> > to service interrupts.
> >
> > It appears as though the fifo is not working for the receive. In an
> > attempt to exhonerate the hardware, I swapped in another 16550 card
> > I had laying around and got the similar results.
>
> it actually is working quite nicely... if it wasn't you would see
> 115,200 * 2 interrupts/sec if the fifo isn't working... but what
One interrupt per **bit** received ???
Well, I thought the UART did provide you with bytes :)
> you are probably seeing is that the recieve fifo is set to 8bytes
> instead of 14bytes (115200*2/26000 ~= 8.8615...)...
(11520/10)/14 ~= 825 int/s per port (using a FIFO depth of 14, which
allows for 170us max. interrupt
latency)
(11520/10)/8 ~= 1440 int/s per port (using a FIFO depth of 8, => 700us)
> also, it's a know fact that the 16550's are kinda heavy on overhead
> (not as bad as a parallel port though)... if you want to do many
> ports at full speed you really should invest in a smarter card,
> like a Digiboard/Cyclom/Riscom/Stallion smart board that has larger
> buffers and usually supports mapped memory access...
Well, the 16550's FIFO will be read a byte a time, and
that means you will be limited to a few MB/s (Bruce Evans
did some testing of ISA port latencies, recently, and
posted his results). This makes some 10 microseconds per
14 bytes (if the receive FIFO was set to 14 bytes, that is).
A FIFO depth of 8 will reduce the time to read out those
8 bytes to some 5 microseconds. This amounts to 7 milli-
seconds per second (or just below 1%) per port, not taking
the interrupt handler overhead into account ...
Regards, STefan
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