Date: Thu, 02 May 2002 07:26:03 +1000 From: Peter Jeremy <peter.jeremy@alcatel.com.au> To: Bernd Walter <ticso@cicely5.cicely.de> Cc: freebsd-alpha@FreeBSD.ORG Subject: Re: AlphaServer 400 interrupt problems Message-ID: <20020502072602.U25071@gsmx07.alcatel.com.au> In-Reply-To: <20020501084436.GH60196@cicely5.cicely.de>; from ticso@cicely5.cicely.de on Wed, May 01, 2002 at 10:44:36AM %2B0200 References: <20020501114313.R25071@gsmx07.alcatel.com.au> <20020501084436.GH60196@cicely5.cicely.de>
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On 2002-May-01 10:44:36 +0200, Bernd Walter <ticso@cicely5.cicely.de> wrote:
>On Wed, May 01, 2002 at 11:43:13AM +1000, Peter Jeremy wrote:
>> A secondary problem is that all interrupts are treated as non-sharable
>> ISA interrupts. I don't believe this is valid. Whilst the AS400
>> interrupt routing uses the standard 8259 pair and interrupts from
>> ISA cards can't be shared, I don't see why the kernel doesn't permit
>> PCI interrupts to be shared. The AS400 technical documentation
>> definitely indicates that interrupts can be shared.
>
>Interesting.
To clarify this, the following is from "Digital AlphaStation 200/400
Series, Technical Information", Part Number: EK-PCDSA-TI. A01
p6-3: "IRQ2: Device Interrupts"
[The IRQ output from the master 8259 is routed to CPU IRQ2].
"When a device interrupt has been detected on CPU line IRQ2, the
PALcode interrupt dispatcher must generate a PCI INTACK cycle. The
PCI-ISA bridge chip sees this cycle and converts it into two cycles
that freeze and then read the normal ISA-style interrupt priority
encoders within the bridge chip. The bridge chip then returns a
vector on data bits <7:0>.
This INTACK cycle does not remove the source of the interrupt;
specific code that accesses the device that interrupted must do this.
The bridge chip releases its interrupt when the interrupt dispatcher
issues an EOI command. This is a cooperative activity performed by
some combination of PALcode and the particular operating system."
p6-4: "Interrupt Inputs"
...
"Because many of the interrupt requests that originate from an ISA slot
can be connected to the same IRQ pin ("shared"), you must ensure that
the jumpers selecting the actual connection are set up so that no
sources are joined together, unless the single interrupt they would
generate can be resolved as to its source."
...
It also includes tables giving the PCI slot/INT to PIRQ routing:
For an AS200:
PIRQ0 = Ethernet | 1B | 2C
PIRQ1 = 1A | 1D | 2B
PIRQ2 = 1C | 2A | 2D
PIRQ3 = SCSI
For an AS400:
PIRQ0 = 1A | 1D | 2B | 3C
PIRQ1 = 2A | 2D | 3B | 1C
PIRQ2 = 3A | 3D | 1B | 2C
PIRQ3 = SCSI
(These can be treated equivalently if you treat the AS200 embedded ethernet
as PCI slot 1, INTA, with physical slots 1 and 2 equivalent to slots 2 & 3
on an AS400).
The comments in dec_2100_a50_intr_map() are somewhat confusing (there
are two slot 3's listed), but one interpretation of the code seems to
agree with this table.
Peter
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