Date: Fri, 16 Oct 2020 13:37:58 +0000 (UTC) From: Mitchell Horne <mhorne@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r366764 - head/sys/arm64/arm64 Message-ID: <202010161337.09GDbwuq054645@repo.freebsd.org>
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Author: mhorne Date: Fri Oct 16 13:37:58 2020 New Revision: 366764 URL: https://svnweb.freebsd.org/changeset/base/366764 Log: arm64: export a few more HWCAPs These were missed in the previous pass. The extensions (partially) supported by this change are: - ARMv8.2-FHM, Floating-point multiplication variant - ARMv8.4-LSE, Large System Extensions - ARMv8.4-DIT, Data Independent Timing instructions Reviewed by: andrew, markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D26707 Modified: head/sys/arm64/arm64/identcpu.c Modified: head/sys/arm64/arm64/identcpu.c ============================================================================== --- head/sys/arm64/arm64/identcpu.c Fri Oct 16 13:35:29 2020 (r366763) +++ head/sys/arm64/arm64/identcpu.c Fri Oct 16 13:37:58 2020 (r366764) @@ -883,7 +883,7 @@ static struct mrs_field_value id_aa64pfr0_el0[] = { static struct mrs_field id_aa64pfr0_fields[] = { MRS_FIELD(ID_AA64PFR0, CSV3, false, MRS_EXACT, id_aa64pfr0_csv3), MRS_FIELD(ID_AA64PFR0, CSV2, false, MRS_EXACT, id_aa64pfr0_csv2), - MRS_FIELD(ID_AA64PFR0, DIT, false, MRS_EXACT, id_aa64pfr0_dit), + MRS_FIELD(ID_AA64PFR0, DIT, false, MRS_LOWER, id_aa64pfr0_dit), MRS_FIELD(ID_AA64PFR0, AMU, false, MRS_EXACT, id_aa64pfr0_amu), MRS_FIELD(ID_AA64PFR0, MPAM, false, MRS_EXACT, id_aa64pfr0_mpam), MRS_FIELD(ID_AA64PFR0, SEL2, false, MRS_EXACT, id_aa64pfr0_sel2), @@ -1257,6 +1257,10 @@ parse_cpu_features_hwcap(void) break; } + if (ID_AA64ISAR0_FHM_VAL(user_cpu_desc.id_aa64isar0) == + ID_AA64ISAR0_FHM_IMPL) + hwcap |= HWCAP_ASIMDFHM; + if (ID_AA64ISAR0_DP_VAL(user_cpu_desc.id_aa64isar0) == ID_AA64ISAR0_DP_IMPL) hwcap |= HWCAP_ASIMDDP; @@ -1337,6 +1341,14 @@ parse_cpu_features_hwcap(void) if (ID_AA64ISAR1_DPB_VAL(user_cpu_desc.id_aa64isar1) == ID_AA64ISAR1_DPB_DCCVAP) hwcap |= HWCAP_DCPOP; + + if (ID_AA64MMFR2_AT_VAL(user_cpu_desc.id_aa64mmfr2) == + ID_AA64MMFR2_AT_IMPL) + hwcap |= HWCAP_USCAT; + + if (ID_AA64PFR0_DIT_VAL(user_cpu_desc.id_aa64pfr0) == + ID_AA64PFR0_DIT_PSTATE) + hwcap |= HWCAP_DIT; if (ID_AA64PFR0_SVE_VAL(user_cpu_desc.id_aa64pfr0) == ID_AA64PFR0_SVE_IMPL)
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