From owner-svn-src-stable-12@freebsd.org Mon Feb 17 09:53:24 2020 Return-Path: Delivered-To: svn-src-stable-12@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 07DDE253B5F; Mon, 17 Feb 2020 09:53:24 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 48LfSM6TtNz4LWS; Mon, 17 Feb 2020 09:53:23 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id D532D51DC; Mon, 17 Feb 2020 09:53:23 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 01H9rNgA084452; Mon, 17 Feb 2020 09:53:23 GMT (envelope-from hselasky@FreeBSD.org) Received: (from hselasky@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 01H9rNU8084449; Mon, 17 Feb 2020 09:53:23 GMT (envelope-from hselasky@FreeBSD.org) Message-Id: <202002170953.01H9rNU8084449@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: hselasky set sender to hselasky@FreeBSD.org using -f From: Hans Petter Selasky Date: Mon, 17 Feb 2020 09:53:23 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r358014 - in stable/12/sys/dev/mlx5: . mlx5_core X-SVN-Group: stable-12 X-SVN-Commit-Author: hselasky X-SVN-Commit-Paths: in stable/12/sys/dev/mlx5: . mlx5_core X-SVN-Commit-Revision: 358014 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable-12@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: SVN commit messages for only the 12-stable src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 17 Feb 2020 09:53:24 -0000 Author: hselasky Date: Mon Feb 17 09:53:23 2020 New Revision: 358014 URL: https://svnweb.freebsd.org/changeset/base/358014 Log: MFC r357801: Add support for disabling and polling MSIX interrupts in mlx5core. Sponsored by: Mellanox Technologies Modified: stable/12/sys/dev/mlx5/driver.h stable/12/sys/dev/mlx5/mlx5_core/mlx5_eq.c stable/12/sys/dev/mlx5/mlx5_core/mlx5_main.c Directory Properties: stable/12/ (props changed) Modified: stable/12/sys/dev/mlx5/driver.h ============================================================================== --- stable/12/sys/dev/mlx5/driver.h Mon Feb 17 09:46:32 2020 (r358013) +++ stable/12/sys/dev/mlx5/driver.h Mon Feb 17 09:53:23 2020 (r358014) @@ -1184,4 +1184,7 @@ static inline bool mlx5_rl_is_supported(struct mlx5_co } #endif +void mlx5_disable_interrupts(struct mlx5_core_dev *); +void mlx5_poll_interrupts(struct mlx5_core_dev *); + #endif /* MLX5_DRIVER_H */ Modified: stable/12/sys/dev/mlx5/mlx5_core/mlx5_eq.c ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_core/mlx5_eq.c Mon Feb 17 09:46:32 2020 (r358013) +++ stable/12/sys/dev/mlx5/mlx5_core/mlx5_eq.c Mon Feb 17 09:53:23 2020 (r358014) @@ -739,3 +739,28 @@ static void mlx5_port_general_notification_event(struc } } +void +mlx5_disable_interrupts(struct mlx5_core_dev *dev) +{ + int nvec = dev->priv.eq_table.num_comp_vectors + MLX5_EQ_VEC_COMP_BASE; + int x; + + for (x = 0; x != nvec; x++) + disable_irq(dev->priv.msix_arr[x].vector); +} + +void +mlx5_poll_interrupts(struct mlx5_core_dev *dev) +{ + struct mlx5_eq *eq; + + if (unlikely(dev->priv.disable_irqs != 0)) + return; + + mlx5_eq_int(dev, &dev->priv.eq_table.cmd_eq); + mlx5_eq_int(dev, &dev->priv.eq_table.async_eq); + mlx5_eq_int(dev, &dev->priv.eq_table.pages_eq); + + list_for_each_entry(eq, &dev->priv.eq_table.comp_eqs_list, list) + mlx5_eq_int(dev, eq); +} Modified: stable/12/sys/dev/mlx5/mlx5_core/mlx5_main.c ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_core/mlx5_main.c Mon Feb 17 09:46:32 2020 (r358013) +++ stable/12/sys/dev/mlx5/mlx5_core/mlx5_main.c Mon Feb 17 09:53:23 2020 (r358014) @@ -1585,7 +1585,7 @@ done: return 0; } -static void mlx5_disable_interrupts(struct mlx5_core_dev *mdev) +static void mlx5_shutdown_disable_interrupts(struct mlx5_core_dev *mdev) { int nvec = mdev->priv.eq_table.num_comp_vectors + MLX5_EQ_VEC_COMP_BASE; int x; @@ -1609,7 +1609,7 @@ static void shutdown_one(struct pci_dev *pdev) set_bit(MLX5_INTERFACE_STATE_TEARDOWN, &dev->intf_state); /* disable all interrupts */ - mlx5_disable_interrupts(dev); + mlx5_shutdown_disable_interrupts(dev); err = mlx5_try_fast_unload(dev); if (err)