From owner-p4-projects@FreeBSD.ORG Fri Apr 27 17:38:46 2007 Return-Path: X-Original-To: p4-projects@freebsd.org Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 73AE716A40B; Fri, 27 Apr 2007 17:38:46 +0000 (UTC) X-Original-To: perforce@FreeBSD.org Delivered-To: perforce@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 4869C16A404 for ; Fri, 27 Apr 2007 17:38:46 +0000 (UTC) (envelope-from rpaulo@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [69.147.83.41]) by mx1.freebsd.org (Postfix) with ESMTP id 2398813C4C9 for ; Fri, 27 Apr 2007 17:38:46 +0000 (UTC) (envelope-from rpaulo@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.8/8.13.8) with ESMTP id l3RHckDH042001 for ; Fri, 27 Apr 2007 17:38:46 GMT (envelope-from rpaulo@FreeBSD.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.13.8/8.13.8/Submit) id l3RHcjB1041998 for perforce@freebsd.org; Fri, 27 Apr 2007 17:38:45 GMT (envelope-from rpaulo@FreeBSD.org) Date: Fri, 27 Apr 2007 17:38:45 GMT Message-Id: <200704271738.l3RHcjB1041998@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to rpaulo@FreeBSD.org using -f From: Rui Paulo To: Perforce Change Reviews Cc: Subject: PERFORCE change 118887 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 27 Apr 2007 17:38:46 -0000 http://perforce.freebsd.org/chv.cgi?CH=118887 Change 118887 by rpaulo@rpaulo_epsilon on 2007/04/27 17:37:58 Add new MSRs found on Core Duo processors. Affected files ... .. //depot/projects/soc2007/rpaulo-macbook/i386/include/specialreg.h#2 edit Differences ... ==== //depot/projects/soc2007/rpaulo-macbook/i386/include/specialreg.h#2 (text+ko) ==== @@ -168,6 +168,15 @@ #define MSR_APICBASE 0x01b #define MSR_EBL_CR_POWERON 0x02a #define MSR_TEST_CTL 0x033 +#define MSR_FEATURE_CONTROL 0x03a +#define MSR_LASTBRANCHR0FROMIP 0x040 /* Last Branch Record N from IP */ +#define MSR_LASTBRANCHR1FROMIP 0x041 +#define MSR_LASTBRANCHR2FROMIP 0x042 +#define MSR_LASTBRANCHR3FROMIP 0x043 +#define MSR_LASTBRANCHR0TOIP 0x060 /* Last Branch Record N to IP */ +#define MSR_LASTBRANCHR1TOIP 0x061 +#define MSR_LASTBRANCHR2TOIP 0x062 +#define MSR_LASTBRANCHR3TOIP 0x063 #define MSR_BIOS_UPDT_TRIG 0x079 #define MSR_BBL_CR_D0 0x088 #define MSR_BBL_CR_D1 0x089 @@ -175,6 +184,9 @@ #define MSR_BIOS_SIGN 0x08b #define MSR_PERFCTR0 0x0c1 #define MSR_PERFCTR1 0x0c2 +#define MSR_FSB_FREQ 0x0cd +#define MSR_MPERF 0x0e7 +#define MSR_APERF 0x0e8 #define MSR_MTRRcap 0x0fe #define MSR_BBL_CR_ADDR 0x116 #define MSR_BBL_CR_DECC 0x118 @@ -190,10 +202,14 @@ #define MSR_MCG_CTL 0x17b #define MSR_EVNTSEL0 0x186 #define MSR_EVNTSEL1 0x187 +#define MSR_PERF_STAT 0x198 +#define MSR_PERF_CTL 0x199 #define MSR_THERM_CONTROL 0x19a #define MSR_THERM_INTERRUPT 0x19b #define MSR_THERM_STATUS 0x19c +#define MSR_THERM2_CONTROL 0x19d #define MSR_IA32_MISC_ENABLE 0x1a0 +#define MSR_LASTBRANCH_TOS 0x1c9 #define MSR_DEBUGCTLMSR 0x1d9 #define MSR_LASTBRANCHFROMIP 0x1db #define MSR_LASTBRANCHTOIP 0x1dc @@ -206,6 +222,15 @@ #define MSR_MTRR4kBase 0x268 #define MSR_PAT 0x277 #define MSR_MTRRdefType 0x2ff +#define MSR_PERF_FIXED_CTR0 0x309 +#define MSR_PERF_FIXED_CTR1 0x30a +#define MSR_PERF_FIXED_CTR2 0x30b +#define MSR_PERF_CAPS 0x345 +#define MSR_PERF_FIXED_CONTROL 0x38d +#define MSR_PERF_GLOBAL_STATUS 0x38e +#define MSR_PERF_GLOBAL_CONTROL 0x38f +#define MSR_PERF_GLOBAL_OVF_CTL 0x390 +#define MSR_PEBS_ENABLE 0x3f1 #define MSR_MC0_CTL 0x400 #define MSR_MC0_STATUS 0x401 #define MSR_MC0_ADDR 0x402