From owner-svn-src-head@FreeBSD.ORG Sat Aug 25 22:35:30 2012 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id B1F18106564A; Sat, 25 Aug 2012 22:35:30 +0000 (UTC) (envelope-from rwatson@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 5DDE98FC08; Sat, 25 Aug 2012 22:35:30 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q7PMZU1N007197; Sat, 25 Aug 2012 22:35:30 GMT (envelope-from rwatson@svn.freebsd.org) Received: (from rwatson@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q7PMZUih007188; Sat, 25 Aug 2012 22:35:30 GMT (envelope-from rwatson@svn.freebsd.org) Message-Id: <201208252235.q7PMZUih007188@svn.freebsd.org> From: Robert Watson Date: Sat, 25 Aug 2012 22:35:30 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r239691 - in head: share/man/man4 sys/dev/terasic sys/dev/terasic/mtl sys/mips/beri sys/mips/conf X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 25 Aug 2012 22:35:30 -0000 Author: rwatson Date: Sat Aug 25 22:35:29 2012 New Revision: 239691 URL: http://svn.freebsd.org/changeset/base/239691 Log: Add terasic_mtl(4), a device driver for the Terasic Multi-Touch LCD, used with Terasic's DE-4 and other similar FPGA boards. This display is 800x480 and includes a capacitive touch screen, multi-touch gesture recognition, etc. This device driver depends on a Cambridge- provided IP core that allows the MTL device to be hooked up to the Altera Avalon SoC bus, and also provides a VGA-like text frame buffer. Although it is compiled as a single device driver, it actually implements a number of different device nodes exporting various aspects of this multi-function device to userspace: - Simple memory-mapped driver for the MTL 24-bit pixel frame buffer. - Simple memory-mapped driver for the MTL control register set. - Simple memory-mapped driver for the MTL text frame buffer. - syscons attachment for the MTL text frame buffer. This driver attaches directly to Nexus as is common for SoC device drivers, and for the time being is considered BERI-specific, although in principle it might be used with other hard and soft cores on Altera FPGAs. Control registers, including touchscreen input, are simply memory mapped; in the future it would be desirable to hook up a more conventional device node that can stream events, support kqueue(2)/ poll(2)/select(2), etc. This is the first use of syscons on MIPS, as far as I can tell, and there are some loose ends, such as an inability to use the hardware cursor. More fundamentally, it appears that syscons(4) assumes that either a host is PC-like (i386, amd64) *or* it must be using a graphical frame buffer. While the MTL supports a graphical frame buffer, using the text frame buffer is preferable for console use. Fixing this issue in syscons(4) requires non-trivial changes, as the text frame buffer support assumes that direct memory access can be done to the text frame buffer without using bus accessor methods, which is not the case on MIPS. As a workaround for this, we instead double-buffer and pretend to be a graphical frame buffer exposing text accessor methods, leading to some quirks in syscons behaviour. Sponsored by: DARPA, AFRL Added: head/share/man/man4/terasic_mtl.4 (contents, props changed) head/sys/dev/terasic/ head/sys/dev/terasic/mtl/ head/sys/dev/terasic/mtl/terasic_mtl.c (contents, props changed) head/sys/dev/terasic/mtl/terasic_mtl.h (contents, props changed) head/sys/dev/terasic/mtl/terasic_mtl_nexus.c (contents, props changed) head/sys/dev/terasic/mtl/terasic_mtl_pixel.c (contents, props changed) head/sys/dev/terasic/mtl/terasic_mtl_reg.c (contents, props changed) head/sys/dev/terasic/mtl/terasic_mtl_syscons.c (contents, props changed) head/sys/dev/terasic/mtl/terasic_mtl_text.c (contents, props changed) Modified: head/share/man/man4/Makefile head/sys/mips/beri/files.beri head/sys/mips/conf/BERI_DE4.hints head/sys/mips/conf/BERI_DE4_MDROOT head/sys/mips/conf/BERI_DE4_SDROOT Modified: head/share/man/man4/Makefile ============================================================================== --- head/share/man/man4/Makefile Sat Aug 25 21:13:00 2012 (r239690) +++ head/share/man/man4/Makefile Sat Aug 25 22:35:29 2012 (r239691) @@ -457,6 +457,7 @@ MAN= aac.4 \ targ.4 \ tcp.4 \ tdfx.4 \ + terasic_mtl.4 \ termios.4 \ textdump.4 \ ti.4 \ Added: head/share/man/man4/terasic_mtl.4 ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/share/man/man4/terasic_mtl.4 Sat Aug 25 22:35:29 2012 (r239691) @@ -0,0 +1,132 @@ +.\"- +.\" Copyright (c) 2012 Robert N. M. Watson +.\" All rights reserved. +.\" +.\" This software was developed by SRI International and the University of +.\" Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) +.\" ("CTSRD"), as part of the DARPA CRASH research programme. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" $FreeBSD$ +.\" +.Dd August 18, 2012 +.Dt TERASIC_MTL 4 +.Os +.Sh NAME +.Nm terasic_mtl +.Nd driver for the Terasic/Cambridge Multi-Touch LCD device +.Sh SYNOPSIS +.Cd "device terasic_mtl" +.Pp +In +.Pa /boot/device.hints : +.Cd hint.terasic_mtl.0.at="nexus0" +.Cd hint.terasic_mtl.0.reg_maddr=0x70400000 +.Cd hint.terasic_mtl.0.reg_msize=0x1000 +.Cd hint.terasic_mtl.0.pixel_maddr=0x70000000 +.Cd hint.terasic_mtl.0.pixel_msize=0x177000 +.Cd hint.terasic_mtl.0.text_maddr=0x70177000 +.Cd hint.terasic_mtl.0.text_msize=0x2000 +.Sh DESCRIPTION +The +.Nm +device driver provides support for the Terasic Multi-Touch LCD combined as +controlled by a University of Cambridge's IP Core. +Three device nodes are instantiated, representing various services supported +by the device: +.Bl -tag -width terasic_pixelX +.It terasic_regX +Memory-mapped register interface, including touch screen input. +.It terasic_pixelX +Memory-mapped pixel-oriented frame buffer. +.It terasic_textX +Memory-mapped text-oriented frame buffer. +.El +.Pp +.Nm +devices are also attached to the +.Xr syscons 4 +framework, which implements a VT-compatible terminal connected to the +.Xr tty 4 +framework. +.Li ttyvX +device nodes may be added to +.Xr ttys 5 +in order to launch +.Xr login 1 +sessions at boot. +.Pp +Register, text, and pixel devices may be accessed using +.Xr read 2 +and +.Xr write 2 +system calls, and also memory mapped using +.Xr mmap 2 . +.Sh SEE ALSO +.Xr login 1 , +.Xr ioctl 2 , +.Xr mmap 2 , +.Xr poll 2 , +.Xr read 2 , +.Xr write 2 , +.Xr syscons 4 , +.Xr tty 4 , +.Xr ttys 5 +.Sh HISTORY +The +.Nm +device driver first appeared in +.Fx 10.0 . +.Sh AUTHORS +The +.Nm +device driver and this manual page were +developed by SRI International and the University of Cambridge Computer +Laboratory under DARPA/AFRL contract +.Pq FA8750-10-C-0237 +.Pq Do CTSRD Dc , +as part of the DARPA CRASH research programme. +This device driver was written by +.An Robert N. M. Watson . +.Sh BUGS +.Nm +The +.Xr syscons 4 +attachment does not support the hardware cursor feature. +.Pp +A more structured interface to control registers using the +.Xr ioctl 2 +system call, would sometimes be preferable to memory mapping. +For touch screen input, it would be highly desirable to offer a streaming +interface whose events can be managed using +.Xr poll 2 +and related system calls, with the kernel performing polling rather than the +userspace application. +.Pp +.Nm +supports only a +.Li nexus +bus attachment, which is appropriate for system-on-chip busses such as +Altera's Avalon bus. +If the IP core is configured off of another bus type, then additional bus +attachments will be required. Added: head/sys/dev/terasic/mtl/terasic_mtl.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/dev/terasic/mtl/terasic_mtl.c Sat Aug 25 22:35:29 2012 (r239691) @@ -0,0 +1,110 @@ +/*- + * Copyright (c) 2012 Robert N. M. Watson + * All rights reserved. + * + * This software was developed by SRI International and the University of + * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) + * ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include /* struct vt_mode */ +#include /* video_adapter_t */ +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +/* + * Device driver for the Terasic Multitouch LCD (MTL). Three separate + * sub-drivers that support, respectively, access to device control registers, + * the pixel frame buffer, and the text frame buffer. The last of these is + * also hooked up to syscons. + * + * Eventually, the frame buffer control registers and touch screen input FIFO + * will end up being separate sub-drivers as well. + * + * Note: sub-driver detach routines must check whether or not they have + * attached as they may be called even if the attach routine hasn't been, on + * an error. + */ +int +terasic_mtl_attach(struct terasic_mtl_softc *sc) +{ + int error; + + error = terasic_mtl_reg_attach(sc); + if (error) + goto error; + error = terasic_mtl_pixel_attach(sc); + if (error) + goto error; + error = terasic_mtl_text_attach(sc); + if (error) + goto error; + /* + * XXXRW: Once we've attached syscons, we can't detach it, so do it + * last. + */ + error = terasic_mtl_syscons_attach(sc); + if (error) + goto error; + terasic_mtl_blend_default_set(sc, TERASIC_MTL_COLOR_BLACK); + terasic_mtl_blend_pixel_set(sc, TERASIC_MTL_ALPHA_TRANSPARENT); + terasic_mtl_blend_textfg_set(sc, TERASIC_MTL_ALPHA_OPAQUE); + terasic_mtl_blend_textbg_set(sc, TERASIC_MTL_ALPHA_OPAQUE); + return (0); +error: + terasic_mtl_text_detach(sc); + terasic_mtl_pixel_detach(sc); + terasic_mtl_reg_detach(sc); + return (error); +} + +void +terasic_mtl_detach(struct terasic_mtl_softc *sc) +{ + + /* XXXRW: syscons can't detach, but we try anyway, only to panic. */ + terasic_mtl_syscons_detach(sc); + + /* All other aspects of the driver can detach just fine. */ + terasic_mtl_text_detach(sc); + terasic_mtl_pixel_detach(sc); + terasic_mtl_reg_detach(sc); +} Added: head/sys/dev/terasic/mtl/terasic_mtl.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/dev/terasic/mtl/terasic_mtl.h Sat Aug 25 22:35:29 2012 (r239691) @@ -0,0 +1,210 @@ +/*- + * Copyright (c) 2012 Robert N. M. Watson + * All rights reserved. + * + * This software was developed by SRI International and the University of + * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) + * ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _DEV_TERASIC_MTL_H_ +#define _DEV_TERASIC_MTL_H_ + +struct terasic_mtl_softc { + /* + * syscons requires that its video_adapter_t be at the front of the + * softc, so place syscons fields first, which we otherwise would + * probably not do. + */ + video_adapter_t mtl_va; + + /* + * Bus-related fields. + */ + device_t mtl_dev; + int mtl_unit; + + /* + * The MTL driver doesn't require a lot of synchronisation; however, + * the lock is used to protect read-modify-write operations on MTL + * registers. + */ + struct mtx mtl_lock; + + /* + * Control register device -- mappable from userspace. + */ + struct cdev *mtl_reg_cdev; + struct resource *mtl_reg_res; + int mtl_reg_rid; + + /* + * Graphics frame buffer device -- mappable form userspace. + */ + struct cdev *mtl_pixel_cdev; + struct resource *mtl_pixel_res; + int mtl_pixel_rid; + + /* + * Text frame buffer device -- mappable from userspace, and syscons + * hookup. + */ + struct cdev *mtl_text_cdev; + struct resource *mtl_text_res; + int mtl_text_rid; + uint16_t *mtl_text_soft; +}; + +#define TERASIC_MTL_LOCK(sc) mtx_lock(&(sc)->mtl_lock) +#define TERASIC_MTL_LOCK_ASSERT(sc) mtx_assert(&(sc)->mtl_lock, MA_OWNED) +#define TERASIC_MTL_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtl_lock) +#define TERASIC_MTL_LOCK_INIT(sc) mtx_init(&(sc)->mtl_lock, \ + "terasic_mtl", NULL, MTX_DEF) +#define TERASIC_MTL_UNLOCK(sc) mtx_unlock(&(sc)->mtl_lock) + +/* + * Constant properties of the MTL text frame buffer. + */ +#define TERASIC_MTL_COLS 100 +#define TERASIC_MTL_ROWS 40 + +/* + * MTL control register offsets. + */ +#define TERASIC_MTL_OFF_BLEND 0 +#define TERASIC_MTL_OFF_TEXTCURSOR 4 +#define TERASIC_MTL_OFF_TEXTFRAMEBUFADDR 8 +#define TERASIC_MTL_OFF_TOUCHPOINT_X1 12 +#define TERASIC_MTL_OFF_TOUCHPOINT_Y1 16 +#define TERASIC_MTL_OFF_TOUCHPOINT_X2 20 +#define TERASIC_MTL_OFF_TOUCHPOINT_Y2 24 +#define TERASIC_MTL_OFF_TOUCHGESTURE 28 + +/* + * Constants to help interpret various control registers. + */ +#define TERASIC_MTL_BLEND_DEFAULT_MASK 0x0f000000 +#define TERASIC_MTL_BLEND_DEFAULT_SHIFT 24 +#define TERASIC_MTL_BLEND_PIXEL_MASK 0x00ff0000 +#define TERASIC_MTL_BLEND_PIXEL_SHIFT 16 +#define TERASIC_MTL_BLEND_TEXTFG_MASK 0x0000ff00 +#define TERASIC_MTL_BLEND_TEXTFG_SHIFT 8 +#define TERASIC_MTL_BLEND_TEXTBG_MASK 0x000000ff +#define TERASIC_MTL_BLEND_TEXTBG_SHIFT 0 +#define TERASIC_MTL_TEXTCURSOR_COL_MASK 0xff00 +#define TERASIC_MTL_TEXTCURSOR_COL_SHIFT 8 +#define TERASIC_MTL_TEXTCURSOR_ROW_MASK 0xff + +/* + * Colours used both by VGA-like text rendering, and for the default display + * colour. + */ +#define TERASIC_MTL_COLOR_BLACK 0 +#define TERASIC_MTL_COLOR_DARKBLUE 1 +#define TERASIC_MTL_COLOR_DARKGREEN 2 +#define TERASIC_MTL_COLOR_DARKCYAN 3 +#define TERASIC_MTL_COLOR_DARKRED 4 +#define TERASIC_MTL_COLOR_DARKMAGENTA 5 +#define TERASIC_MTL_COLOR_BROWN 6 +#define TERASIC_MTL_COLOR_LIGHTGREY 7 +#define TERASIC_MTL_COLOR_DARKGREY 8 +#define TERASIC_MTL_COLOR_LIGHTBLUE 9 +#define TERASIC_MTL_COLOR_LIGHTGREEN 10 +#define TERASIC_MTL_COLOR_LIGHTCYAN 11 +#define TERASIC_MTL_COLOR_LIGHTRED 12 +#define TERASIC_MTL_COLOR_LIGHTMAGENTA 13 +#define TERASIC_MTL_COLOR_LIGHTYELLOW 14 +#define TERASIC_MTL_COLOR_WHITE 15 +#define TERASIC_MTL_COLORMASK_BLINK 0x80 + +/* + * Constants to help interpret the text frame buffer. + */ +#define TERASIC_MTL_TEXTFRAMEBUF_EXPECTED_ADDR 0x0177000 +#define TERASIC_MTL_TEXTFRAMEBUF_CHAR_SHIFT 0 +#define TERASIC_MTL_TEXTFRAMEBUF_ATTR_SHIFT 8 + +/* + * Alpha-blending constants. + */ +#define TERASIC_MTL_ALPHA_TRANSPARENT 0 +#define TERASIC_MTL_ALPHA_OPAQUE 255 + +/* + * Driver setup routines from the bus attachment/teardown. + */ +int terasic_mtl_attach(struct terasic_mtl_softc *sc); +void terasic_mtl_detach(struct terasic_mtl_softc *sc); + +/* + * Sub-driver setup routines. + */ +int terasic_mtl_pixel_attach(struct terasic_mtl_softc *sc); +void terasic_mtl_pixel_detach(struct terasic_mtl_softc *sc); +int terasic_mtl_reg_attach(struct terasic_mtl_softc *sc); +void terasic_mtl_reg_detach(struct terasic_mtl_softc *sc); +int terasic_mtl_syscons_attach(struct terasic_mtl_softc *sc); +void terasic_mtl_syscons_detach(struct terasic_mtl_softc *sc); +int terasic_mtl_text_attach(struct terasic_mtl_softc *sc); +void terasic_mtl_text_detach(struct terasic_mtl_softc *sc); + +/* + * Control register I/O routines. + */ +void terasic_mtl_reg_blank(struct terasic_mtl_softc *sc); + +void terasic_mtl_reg_blend_get(struct terasic_mtl_softc *sc, + uint32_t *blendp); +void terasic_mtl_reg_blend_set(struct terasic_mtl_softc *sc, + uint32_t blend); +void terasic_mtl_reg_textcursor_get(struct terasic_mtl_softc *sc, + uint8_t *colp, uint8_t *rowp); +void terasic_mtl_reg_textcursor_set(struct terasic_mtl_softc *sc, + uint8_t col, uint8_t row); +void terasic_mtl_reg_textframebufaddr_get(struct terasic_mtl_softc *sc, + uint32_t *addrp); +void terasic_mtl_reg_textframebufaddr_set(struct terasic_mtl_softc *sc, + uint32_t addr); + +/* + * Read-modify-write updates of sub-bytes of the blend register. + */ +void terasic_mtl_blend_default_set(struct terasic_mtl_softc *sc, + uint8_t colour); +void terasic_mtl_blend_pixel_set(struct terasic_mtl_softc *sc, + uint8_t alpha); +void terasic_mtl_blend_textfg_set(struct terasic_mtl_softc *sc, + uint8_t alpha); +void terasic_mtl_blend_textbg_set(struct terasic_mtl_softc *sc, + uint8_t alpha); + +/* + * Text frame buffer I/O routines. + */ +void terasic_mtl_text_putc(struct terasic_mtl_softc *sc, u_int x, u_int y, + uint8_t c, uint8_t a); + +#endif /* _DEV_TERASIC_MTL_H_ */ Added: head/sys/dev/terasic/mtl/terasic_mtl_nexus.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/dev/terasic/mtl/terasic_mtl_nexus.c Sat Aug 25 22:35:29 2012 (r239691) @@ -0,0 +1,196 @@ +/*- + * Copyright (c) 2012 Robert N. M. Watson + * All rights reserved. + * + * This software was developed by SRI International and the University of + * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) + * ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include /* struct vt_mode */ +#include /* video_adapter_t */ +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +static int +terasic_mtl_nexus_probe(device_t dev) +{ + + device_set_desc(dev, "Terasic Multi-touch LCD (MTL)"); + return (BUS_PROBE_DEFAULT); +} + +static int +terasic_mtl_nexus_attach(device_t dev) +{ + struct terasic_mtl_softc *sc; + u_long pixel_maddr, text_maddr, reg_maddr; + u_long pixel_msize, text_msize, reg_msize; + int error; + + sc = device_get_softc(dev); + sc->mtl_dev = dev; + sc->mtl_unit = device_get_unit(dev); + + /* + * Query non-standard hints to find the locations of our two memory + * regions. Enforce certain alignment and size requirements. + */ + if (resource_long_value(device_get_name(dev), device_get_unit(dev), + "reg_maddr", ®_maddr) != 0 || (reg_maddr % PAGE_SIZE != 0)) { + device_printf(dev, "improper register address"); + return (ENXIO); + } + if (resource_long_value(device_get_name(dev), device_get_unit(dev), + "reg_msize", ®_msize) != 0 || (reg_msize % PAGE_SIZE != 0)) { + device_printf(dev, "improper register size"); + return (ENXIO); + } + if (resource_long_value(device_get_name(dev), device_get_unit(dev), + "pixel_maddr", &pixel_maddr) != 0 || + (pixel_maddr % PAGE_SIZE != 0)) { + device_printf(dev, "improper pixel frame buffer address"); + return (ENXIO); + } + if (resource_long_value(device_get_name(dev), device_get_unit(dev), + "pixel_msize", &pixel_msize) != 0 || + (pixel_msize % PAGE_SIZE != 0)) { + device_printf(dev, "improper pixel frame buffer size"); + return (ENXIO); + } + if (resource_long_value(device_get_name(dev), device_get_unit(dev), + "text_maddr", &text_maddr) != 0 || + (text_maddr % PAGE_SIZE != 0)) { + device_printf(dev, "improper text frame buffer address"); + return (ENXIO); + } + if (resource_long_value(device_get_name(dev), device_get_unit(dev), + "text_msize", &text_msize) != 0 || + (text_msize % PAGE_SIZE != 0)) { + device_printf(dev, "improper text frame buffer size"); + return (ENXIO); + } + + /* + * Allocate resources. + */ + sc->mtl_reg_rid = 0; + sc->mtl_reg_res = bus_alloc_resource(dev, SYS_RES_MEMORY, + &sc->mtl_reg_rid, reg_maddr, reg_maddr + reg_msize - 1, + reg_msize, RF_ACTIVE); + if (sc->mtl_reg_res == NULL) { + device_printf(dev, "couldn't map register memory\n"); + error = ENXIO; + goto error; + } + device_printf(sc->mtl_dev, "registers at mem %p-%p\n", + (void *)reg_maddr, (void *)(reg_maddr + reg_msize)); + sc->mtl_pixel_rid = 0; + sc->mtl_pixel_res = bus_alloc_resource(dev, SYS_RES_MEMORY, + &sc->mtl_pixel_rid, pixel_maddr, pixel_maddr + pixel_msize - 1, + pixel_msize, RF_ACTIVE); + if (sc->mtl_pixel_res == NULL) { + device_printf(dev, "couldn't map pixel memory\n"); + error = ENXIO; + goto error; + } + device_printf(sc->mtl_dev, "pixel frame buffer at mem %p-%p\n", + (void *)pixel_maddr, (void *)(pixel_maddr + pixel_msize)); + sc->mtl_text_rid = 0; + sc->mtl_text_res = bus_alloc_resource(dev, SYS_RES_MEMORY, + &sc->mtl_text_rid, text_maddr, text_maddr + text_msize - 1, + text_msize, RF_ACTIVE); + if (sc->mtl_text_res == NULL) { + device_printf(dev, "couldn't map text memory\n"); + error = ENXIO; + goto error; + } + device_printf(sc->mtl_dev, "text frame buffer at mem %p-%p\n", + (void *)text_maddr, (void *)(text_maddr + text_msize)); + error = terasic_mtl_attach(sc); + if (error == 0) + return (0); +error: + if (sc->mtl_text_res != NULL) + bus_release_resource(dev, SYS_RES_MEMORY, sc->mtl_text_rid, + sc->mtl_text_res); + if (sc->mtl_pixel_res != NULL) + bus_release_resource(dev, SYS_RES_MEMORY, sc->mtl_pixel_rid, + sc->mtl_pixel_res); + if (sc->mtl_reg_res != NULL) + bus_release_resource(dev, SYS_RES_MEMORY, sc->mtl_reg_rid, + sc->mtl_reg_res); + return (error); +} + +static int +terasic_mtl_nexus_detach(device_t dev) +{ + struct terasic_mtl_softc *sc; + + sc = device_get_softc(dev); + terasic_mtl_detach(sc); + bus_release_resource(dev, SYS_RES_MEMORY, sc->mtl_text_rid, + sc->mtl_text_res); + bus_release_resource(dev, SYS_RES_MEMORY, sc->mtl_pixel_rid, + sc->mtl_pixel_res); + bus_release_resource(dev, SYS_RES_MEMORY, sc->mtl_reg_rid, + sc->mtl_reg_res); + return (0); +} + +static device_method_t terasic_mtl_nexus_methods[] = { + DEVMETHOD(device_probe, terasic_mtl_nexus_probe), + DEVMETHOD(device_attach, terasic_mtl_nexus_attach), + DEVMETHOD(device_detach, terasic_mtl_nexus_detach), + { 0, 0 } +}; + +static driver_t terasic_mtl_nexus_driver = { + "terasic_mtl", + terasic_mtl_nexus_methods, + sizeof(struct terasic_mtl_softc), +}; + +static devclass_t terasic_mtl_devclass; + +DRIVER_MODULE(mtl, nexus, terasic_mtl_nexus_driver, terasic_mtl_devclass, 0, + 0); Added: head/sys/dev/terasic/mtl/terasic_mtl_pixel.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/dev/terasic/mtl/terasic_mtl_pixel.c Sat Aug 25 22:35:29 2012 (r239691) @@ -0,0 +1,159 @@ +/*- + * Copyright (c) 2012 Robert N. M. Watson + * All rights reserved. + * + * This software was developed by SRI International and the University of + * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) + * ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include /* struct vt_mode */ +#include /* video_adapter_t */ +#include +#include +#include +#include + +#include +#include +#include + +#include + +static d_mmap_t terasic_mtl_pixel_mmap; +static d_read_t terasic_mtl_pixel_read; +static d_write_t terasic_mtl_pixel_write; + +static struct cdevsw mtl_pixel_cdevsw = { + .d_version = D_VERSION, + .d_mmap = terasic_mtl_pixel_mmap, + .d_read = terasic_mtl_pixel_read, + .d_write = terasic_mtl_pixel_write, + .d_name = "terasic_mtl_pixel", +}; + +/* + * All I/O to/from the MTL pixel device must be 32-bit, and aligned to 32-bit. + */ +static int +terasic_mtl_pixel_read(struct cdev *dev, struct uio *uio, int flag) +{ + struct terasic_mtl_softc *sc; + u_long offset, size; + uint32_t v; + int error; + + if (uio->uio_offset < 0 || uio->uio_offset % 4 != 0 || + uio->uio_resid % 4 != 0) + return (ENODEV); + sc = dev->si_drv1; + size = rman_get_size(sc->mtl_pixel_res); + error = 0; + if ((uio->uio_offset + uio->uio_resid < 0) || + (uio->uio_offset + uio->uio_resid > size)) + return (ENODEV); + while (uio->uio_resid > 0) { + offset = uio->uio_offset; + if (offset + sizeof(v) > size) + return (ENODEV); + v = bus_read_4(sc->mtl_pixel_res, offset); + error = uiomove(&v, sizeof(v), uio); + if (error) + return (error); + } + return (error); +} + +static int +terasic_mtl_pixel_write(struct cdev *dev, struct uio *uio, int flag) +{ + struct terasic_mtl_softc *sc; + u_long offset, size; + uint32_t v; + int error; + + if (uio->uio_offset < 0 || uio->uio_offset % 4 != 0 || + uio->uio_resid % 4 != 0) + return (ENODEV); + sc = dev->si_drv1; + size = rman_get_size(sc->mtl_pixel_res); + error = 0; + while (uio->uio_resid > 0) { + offset = uio->uio_offset; + if (offset + sizeof(v) > size) + return (ENODEV); + error = uiomove(&v, sizeof(v), uio); + if (error) + return (error); + bus_write_4(sc->mtl_pixel_res, offset, v); + } + return (error); +} + +static int +terasic_mtl_pixel_mmap(struct cdev *dev, vm_ooffset_t offset, + vm_paddr_t *paddr, int nprot, vm_memattr_t *memattr) +{ + struct terasic_mtl_softc *sc; + int error; + + sc = dev->si_drv1; + error = 0; + if (trunc_page(offset) == offset && + rman_get_size(sc->mtl_pixel_res) >= offset + PAGE_SIZE) { + *paddr = rman_get_start(sc->mtl_pixel_res) + offset; + *memattr = VM_MEMATTR_UNCACHEABLE; + } else + error = ENODEV; + return (error); +} + +int +terasic_mtl_pixel_attach(struct terasic_mtl_softc *sc) +{ + + sc->mtl_pixel_cdev = make_dev(&mtl_pixel_cdevsw, sc->mtl_unit, + UID_ROOT, GID_WHEEL, 0400, "mtl_pixel%d", sc->mtl_unit); + if (sc->mtl_pixel_cdev == NULL) { + device_printf(sc->mtl_dev, "%s: make_dev failed\n", __func__); + return (ENXIO); + } + /* XXXRW: Slight race between make_dev(9) and here. */ + sc->mtl_pixel_cdev->si_drv1 = sc; + return (0); +} + +void +terasic_mtl_pixel_detach(struct terasic_mtl_softc *sc) +{ + + if (sc->mtl_pixel_cdev != NULL) + destroy_dev(sc->mtl_pixel_cdev); +} Added: head/sys/dev/terasic/mtl/terasic_mtl_reg.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/dev/terasic/mtl/terasic_mtl_reg.c Sat Aug 25 22:35:29 2012 (r239691) @@ -0,0 +1,278 @@ +/*- + * Copyright (c) 2012 Robert N. M. Watson + * All rights reserved. + * + * This software was developed by SRI International and the University of + * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) + * ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include /* struct vt_mode */ +#include +#include /* video_adapter_t */ +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + +static d_mmap_t terasic_mtl_reg_mmap; +static d_read_t terasic_mtl_reg_read; +static d_write_t terasic_mtl_reg_write; + +static struct cdevsw terasic_mtl_reg_cdevsw = { + .d_version = D_VERSION, + .d_mmap = terasic_mtl_reg_mmap, + .d_read = terasic_mtl_reg_read, + .d_write = terasic_mtl_reg_write, + .d_name = "terasic_mtl_reg", +}; + +/* + * All I/O to/from the MTL register device must be 32-bit, and aligned to + * 32-bit. + */ +static int +terasic_mtl_reg_read(struct cdev *dev, struct uio *uio, int flag) +{ + struct terasic_mtl_softc *sc; + u_long offset, size; + uint32_t v; + int error; + + if (uio->uio_offset < 0 || uio->uio_offset % 4 != 0 || + uio->uio_resid % 4 != 0) + return (ENODEV); + sc = dev->si_drv1; + size = rman_get_size(sc->mtl_reg_res); + error = 0; + if ((uio->uio_offset + uio->uio_resid < 0) || + (uio->uio_offset + uio->uio_resid > size)) + return (ENODEV); + while (uio->uio_resid > 0) { + offset = uio->uio_offset; + if (offset + sizeof(v) > size) + return (ENODEV); + v = bus_read_4(sc->mtl_reg_res, offset); + error = uiomove(&v, sizeof(v), uio); + if (error) + return (error); + } + return (error); +} + +static int +terasic_mtl_reg_write(struct cdev *dev, struct uio *uio, int flag) +{ + struct terasic_mtl_softc *sc; + u_long offset, size; + uint32_t v; + int error; + + if (uio->uio_offset < 0 || uio->uio_offset % 4 != 0 || + uio->uio_resid % 4 != 0) + return (ENODEV); + sc = dev->si_drv1; + size = rman_get_size(sc->mtl_reg_res); + error = 0; + while (uio->uio_resid > 0) { + offset = uio->uio_offset; + if (offset + sizeof(v) > size) + return (ENODEV); + error = uiomove(&v, sizeof(v), uio); + if (error) + return (error); + bus_write_4(sc->mtl_reg_res, offset, v); + } + return (error); +} + +static int +terasic_mtl_reg_mmap(struct cdev *dev, vm_ooffset_t offset, vm_paddr_t *paddr, + int nprot, vm_memattr_t *memattr) +{ + struct terasic_mtl_softc *sc; + int error; + + sc = dev->si_drv1; + error = 0; + if (trunc_page(offset) == offset && + rman_get_size(sc->mtl_reg_res) >= offset + PAGE_SIZE) { + *paddr = rman_get_start(sc->mtl_reg_res) + offset; + *memattr = VM_MEMATTR_UNCACHEABLE; + } else + error = ENODEV; + return (error); +} + +void +terasic_mtl_reg_blend_get(struct terasic_mtl_softc *sc, uint32_t *blendp) +{ + + *blendp = le32toh(bus_read_4(sc->mtl_reg_res, TERASIC_MTL_OFF_BLEND)); +} + +void +terasic_mtl_reg_blend_set(struct terasic_mtl_softc *sc, uint32_t blend) +{ + + bus_write_4(sc->mtl_reg_res, TERASIC_MTL_OFF_BLEND, htole32(blend)); +} + +void +terasic_mtl_blend_default_set(struct terasic_mtl_softc *sc, uint8_t colour) +{ + uint32_t v; + + TERASIC_MTL_LOCK(sc); + terasic_mtl_reg_blend_get(sc, &v); + v &= ~TERASIC_MTL_BLEND_DEFAULT_MASK; + v |= colour << TERASIC_MTL_BLEND_DEFAULT_SHIFT; + terasic_mtl_reg_blend_set(sc, v); + TERASIC_MTL_UNLOCK(sc); *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***