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From: Pyun YongHyeon <yongari@FreeBSD.org>
Date: Tue, 16 Nov 2010 20:34:00 +0000 (UTC)
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Subject: svn commit: r215406 - in stable/7/sys: dev/re pci
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Author: yongari
Date: Tue Nov 16 20:34:00 2010
New Revision: 215406
URL: http://svn.freebsd.org/changeset/base/215406

Log:
  MFC r215017,215025:
    Follow the lead of vendor's interrupt moderation mechanism.
    It seems RTL8169/RTL8168/RTL810xE has a kind of interrupt
    moderation mechanism but it is not documented at all. The magic
    value dramatically reduced number of interrupts without noticeable
    performance drops so apply it to all RTL8169/RTL8169 controllers.
    Vendor's FreeBSD driver also applies it to RTL810xE controllers but
    their Linux driver explicitly cleared the register, so do not
    enable interrupt moderation for RTL810xE controllers.
  
    While I'm here sort 8169 specific registers.
  
    Obtained from:	RealTek FreeBSD driver
  
  MFC r215025:
    Only moderate TX completion interrupts. Relying on taskqueue to
    suppress RX interrupts seems to give better RX performance than
    RX interrupt moderation.

Modified:
  stable/7/sys/dev/re/if_re.c
  stable/7/sys/pci/if_rlreg.h
Directory Properties:
  stable/7/sys/   (props changed)
  stable/7/sys/cddl/contrib/opensolaris/   (props changed)
  stable/7/sys/contrib/dev/acpica/   (props changed)
  stable/7/sys/contrib/pf/   (props changed)

Modified: stable/7/sys/dev/re/if_re.c
==============================================================================
--- stable/7/sys/dev/re/if_re.c	Tue Nov 16 20:32:09 2010	(r215405)
+++ stable/7/sys/dev/re/if_re.c	Tue Nov 16 20:34:00 2010	(r215406)
@@ -2709,6 +2709,24 @@ re_init_locked(struct rl_softc *sc)
 	 */
 	re_set_rxmode(sc);
 
+	/* Configure interrupt moderation. */
+	if (sc->rl_type == RL_8169) {
+		switch (sc->rl_hwrev) {
+		case RL_HWREV_8100E:
+		case RL_HWREV_8101E:
+		case RL_HWREV_8102E:
+		case RL_HWREV_8102EL:
+		case RL_HWREV_8102EL_SPIN1:
+		case RL_HWREV_8103E:
+			CSR_WRITE_2(sc, RL_INTRMOD, 0);
+			break;
+		default:
+			/* Magic from vendor. */
+			CSR_WRITE_2(sc, RL_INTRMOD, 0x5100);
+			break;
+		}
+	}
+
 #ifdef DEVICE_POLLING
 	/*
 	 * Disable interrupts if we are polling.

Modified: stable/7/sys/pci/if_rlreg.h
==============================================================================
--- stable/7/sys/pci/if_rlreg.h	Tue Nov 16 20:32:09 2010	(r215405)
+++ stable/7/sys/pci/if_rlreg.h	Tue Nov 16 20:34:00 2010	(r215406)
@@ -125,6 +125,7 @@
 /*
  * Registers specific to the 8169 gigE chip
  */
+#define RL_GTXSTART		0x0038	/* 8 bits */
 #define RL_TIMERINT_8169	0x0058	/* different offset than 8139 */
 #define RL_PHYAR		0x0060
 #define RL_TBICSR		0x0064
@@ -135,7 +136,7 @@
 #define RL_GPIO			0x006E	/* 8 bits, 8168C SPIN2 only */
 #define RL_PMCH			0x006F	/* 8 bits */
 #define RL_MAXRXPKTLEN		0x00DA	/* 16 bits, chip multiplies by 8 */
-#define RL_GTXSTART		0x0038	/* 8 bits */
+#define RL_INTRMOD		0x00E2	/* 16 bits */
 
 /*
  * TX config register bits