From owner-svn-src-head@freebsd.org Fri Feb 12 16:06:54 2016 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 60B3FAA6803; Fri, 12 Feb 2016 16:06:54 +0000 (UTC) (envelope-from adrian.chadd@gmail.com) Received: from mail-io0-x232.google.com (mail-io0-x232.google.com [IPv6:2607:f8b0:4001:c06::232]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 37007A2D; Fri, 12 Feb 2016 16:06:54 +0000 (UTC) (envelope-from adrian.chadd@gmail.com) Received: by mail-io0-x232.google.com with SMTP id g203so70250215iof.2; Fri, 12 Feb 2016 08:06:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=8Cn3nZcAFvHodvMjO7XdUZTUrCmjpsfizVpBeBWbOkQ=; b=K2XdWp4+GE6Pxa5io71iRNYYysRgGpSHWQgDRfK/9/gzaj6CWsDcaskqaTTIG2aNn+ /Ll7pfGtwj4TSaCZIz9JkspaG3sQgLkIND2HyBMl696hjoQd9r8E4nYyrIEcbipRisip tVWexNi6AXm0gU3K0fJuPd9NHYEx/adx0VC/8KBIEotllb1xjCdaDtVboz7Hn+jIAp/S hGnwa7mu4jEI/LEIky+Z/m9Z2N4t/EjK5S4y0AhUdtgj/PvsN8e4nnmjRkqdMfb02tE5 ipY93I8xCo/35W2Fw3Qmly8yIqtm98vdjbqMaZmJe+B7mlb9t0cXy0K9ssO5z5JVBnDu juKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=8Cn3nZcAFvHodvMjO7XdUZTUrCmjpsfizVpBeBWbOkQ=; b=VKqyql4ffcn3wJ+EHWRMaBaxGhTr7Fatqaaa02FtX57xB/ENB0LsGE68U73LJfNQQu vWNbdzJBqKt0/GcoRM/XA0XLHJpiURnOWP+GJl8ty1JQhgtufwnCS2vod+bR98qXo+/7 +8OXgJHrVzWGY0/s2tC1wy/+LMXm84QIlXYT0PEVuzc4MScJt5pFP6SkYF1XgaavxyvN JF/Ir1VxA3s3MukOzs+5stkQe2MF0DE23pMUgPsclVFrmP5R52plkPhPKfRMv+23c/Pi GlCxexRD7jAG30/T/SUBqDYfvz2M2jbNJ5ZxgjfAkrI7TvXKVjcupCW9Ql4tLChtZnxn w9Bw== X-Gm-Message-State: AG10YOTELFA6dsIgVRlVu5VJEmOg7csutIGKwL98Q6ONBfyQhoNlvghkjv+KSA94BMFH3eoiitjWHTBu0QmG1w== MIME-Version: 1.0 X-Received: by 10.107.11.231 with SMTP id 100mr3533703iol.165.1455293213685; Fri, 12 Feb 2016 08:06:53 -0800 (PST) Received: by 10.36.14.19 with HTTP; Fri, 12 Feb 2016 08:06:53 -0800 (PST) In-Reply-To: <201602120727.u1C7ROYF090987@repo.freebsd.org> References: <201602120727.u1C7ROYF090987@repo.freebsd.org> Date: Fri, 12 Feb 2016 08:06:53 -0800 Message-ID: Subject: Re: svn commit: r295560 - head/sys/dev/hwpmc From: Adrian Chadd To: Konstantin Belousov Cc: "src-committers@freebsd.org" , "svn-src-all@freebsd.org" , "svn-src-head@freebsd.org" Content-Type: text/plain; charset=UTF-8 X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 12 Feb 2016 16:06:54 -0000 Hah great catch! I always wondered about this! -a On 11 February 2016 at 23:27, Konstantin Belousov wrote: > Author: kib > Date: Fri Feb 12 07:27:24 2016 > New Revision: 295560 > URL: https://svnweb.freebsd.org/changeset/base/295560 > > Log: > If full width writes to the performance monitoring counters are > supported, use full-width aliases MSRs for writes. This fixes the > "[pmc,X] negative increment" assertion on the context switch when > clipped counter value is sign-extended. > > Add definitions for the MSR IA32_PERF_CAPABILITIES needed to detect > the feature. > > PR: 207068 > Submitted by: joss.upton@yahoo.com > MFC after: 2 weeks > > Modified: > head/sys/dev/hwpmc/hwpmc_core.c > head/sys/dev/hwpmc/hwpmc_core.h > > Modified: head/sys/dev/hwpmc/hwpmc_core.c > ============================================================================== > --- head/sys/dev/hwpmc/hwpmc_core.c Fri Feb 12 07:20:27 2016 (r295559) > +++ head/sys/dev/hwpmc/hwpmc_core.c Fri Feb 12 07:27:24 2016 (r295560) > @@ -103,6 +103,7 @@ static int core_iaf_npmc; > > static int core_iap_width; > static int core_iap_npmc; > +static int core_iap_wroffset; > > static int > core_pcpu_noop(struct pmc_mdep *md, int cpu) > @@ -2473,7 +2474,7 @@ iap_read_pmc(int cpu, int ri, pmc_value_ > *v = tmp & ((1ULL << core_iap_width) - 1); > > PMCDBG4(MDP,REA,1, "iap-read cpu=%d ri=%d msr=0x%x -> v=%jx", cpu, ri, > - ri, *v); > + IAP_PMC0 + ri, *v); > > return (0); > } > @@ -2605,19 +2606,20 @@ iap_write_pmc(int cpu, int ri, pmc_value > ("[core,%d] cpu%d ri%d no configured PMC to stop", __LINE__, > cpu, ri)); > > - PMCDBG4(MDP,WRI,1, "iap-write cpu=%d ri=%d msr=0x%x v=%jx", cpu, ri, > - IAP_PMC0 + ri, v); > - > if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) > v = iap_reload_count_to_perfctr_value(v); > > - /* > - * Write the new value to the counter. The counter will be in > - * a stopped state when the pcd_write() entry point is called. > - */ > + v &= (1ULL << core_iap_width) - 1; > > - wrmsr(IAP_PMC0 + ri, v & ((1ULL << core_iap_width) - 1)); > + PMCDBG4(MDP,WRI,1, "iap-write cpu=%d ri=%d msr=0x%x v=%jx", cpu, ri, > + IAP_PMC0 + ri, v); > > + /* > + * Write the new value to the counter (or it's alias). The > + * counter will be in a stopped state when the pcd_write() > + * entry point is called. > + */ > + wrmsr(core_iap_wroffset + IAP_PMC0 + ri, v); > return (0); > } > > @@ -2700,7 +2702,7 @@ core_intr(int cpu, struct trapframe *tf) > */ > msr = rdmsr(IAP_EVSEL0 + ri) & ~IAP_EVSEL_MASK; > wrmsr(IAP_EVSEL0 + ri, msr); > - wrmsr(IAP_PMC0 + ri, v); > + wrmsr(core_iap_wroffset + IAP_PMC0 + ri, v); > > if (error) > continue; > @@ -2814,7 +2816,7 @@ core2_intr(int cpu, struct trapframe *tf > (uintmax_t) v); > > /* Reload sampling count. */ > - wrmsr(IAP_PMC0 + n, v); > + wrmsr(core_iap_wroffset + IAP_PMC0 + n, v); > } > > /* > @@ -2865,6 +2867,18 @@ pmc_core_initialize(struct pmc_mdep *md, > return (EPROGMISMATCH); > } > > + core_iap_wroffset = 0; > + if (cpu_feature2 & CPUID2_PDCM) { > + if (rdmsr(IA32_PERF_CAPABILITIES) & PERFCAP_FW_WRITE) { > + PMCDBG0(MDP, INI, 1, > + "core-init full-width write supported"); > + core_iap_wroffset = IAP_A_PMC0 - IAP_PMC0; > + } else > + PMCDBG0(MDP, INI, 1, > + "core-init full-width write NOT supported"); > + } else > + PMCDBG0(MDP, INI, 1, "core-init pdcm not supported"); > + > core_pmcmask = 0; > > /* > > Modified: head/sys/dev/hwpmc/hwpmc_core.h > ============================================================================== > --- head/sys/dev/hwpmc/hwpmc_core.h Fri Feb 12 07:20:27 2016 (r295559) > +++ head/sys/dev/hwpmc/hwpmc_core.h Fri Feb 12 07:27:24 2016 (r295560) > @@ -29,6 +29,14 @@ > #ifndef _DEV_HWPMC_CORE_H_ > #define _DEV_HWPMC_CORE_H_ 1 > > +#define IA32_PERF_CAPABILITIES 0x345 > +#define PERFCAP_LBR_FORMAT 0x003f > +#define PERFCAP_PEBS_TRAP 0x0040 > +#define PERFCAP_PEBS_SAVEARCH 0x0080 > +#define PERFCAP_PEBS_RECFORMAT 0x0f00 > +#define PERFCAP_SMM_FREEZE 0x1000 > +#define PERFCAP_FW_WRITE 0x2000 /* full width write aliases */ > + > /* > * Fixed-function PMCs. > */ > @@ -101,6 +109,7 @@ struct pmc_md_iap_op_pmcallocate { > */ > > #define IAP_PMC0 0x0C1 > +#define IAP_A_PMC0 0x4C1 > > /* > * IAP_EVSEL(n) is laid out in the following way. >