From owner-svn-src-all@FreeBSD.ORG Wed Feb 5 20:52:13 2014 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id E7279A9F; Wed, 5 Feb 2014 20:52:12 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id C2D7F1849; Wed, 5 Feb 2014 20:52:12 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s15KqC2p038489; Wed, 5 Feb 2014 20:52:12 GMT (envelope-from jhb@svn.freebsd.org) Received: (from jhb@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s15KqCgg038487; Wed, 5 Feb 2014 20:52:12 GMT (envelope-from jhb@svn.freebsd.org) Message-Id: <201402052052.s15KqCgg038487@svn.freebsd.org> From: John Baldwin Date: Wed, 5 Feb 2014 20:52:12 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r261527 - head/sys/dev/pci X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 Feb 2014 20:52:13 -0000 Author: jhb Date: Wed Feb 5 20:52:12 2014 New Revision: 261527 URL: http://svnweb.freebsd.org/changeset/base/261527 Log: Add two tunables to ignore certain firmware-assigned resources. These are mostly useful for debugging. - hw.pci.clear_bars ignores all firmware-assigned ranges for BARs when set. - hw.pci.clear_pcib ignores all firmware-assigned ranges for PCI-PCI bridge I/O windows when set. MFC after: 1 week Modified: head/sys/dev/pci/pci.c head/sys/dev/pci/pci_pci.c Modified: head/sys/dev/pci/pci.c ============================================================================== --- head/sys/dev/pci/pci.c Wed Feb 5 20:47:49 2014 (r261526) +++ head/sys/dev/pci/pci.c Wed Feb 5 20:52:12 2014 (r261527) @@ -332,6 +332,11 @@ SYSCTL_INT(_hw_pci, OID_AUTO, usb_early_ Disable this if you depend on BIOS emulation of USB devices, that is\n\ you use USB devices (like keyboard or mouse) but do not load USB drivers"); +static int pci_clear_bars; +TUNABLE_INT("hw.pci.clear_bars", &pci_clear_bars); +SYSCTL_INT(_hw_pci, OID_AUTO, clear_bars, CTLFLAG_RDTUN, &pci_clear_bars, 0, + "Ignore firmware-assigned resources for BARs."); + static int pci_has_quirk(uint32_t devid, int quirk) { @@ -2851,7 +2856,7 @@ pci_add_map(device_t bus, device_t dev, flags = RF_ALIGNMENT_LOG2(mapsize); if (prefetch) flags |= RF_PREFETCHABLE; - if (basezero || base == pci_mapbase(testval)) { + if (basezero || base == pci_mapbase(testval) || pci_clear_bars) { start = 0; /* Let the parent decide. */ end = ~0ul; } else { Modified: head/sys/dev/pci/pci_pci.c ============================================================================== --- head/sys/dev/pci/pci_pci.c Wed Feb 5 20:47:49 2014 (r261526) +++ head/sys/dev/pci/pci_pci.c Wed Feb 5 20:52:12 2014 (r261527) @@ -103,6 +103,12 @@ DEFINE_CLASS_0(pcib, pcib_driver, pcib_m DRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, NULL, NULL); #ifdef NEW_PCIB +SYSCTL_DECL(_hw_pci); + +static int pci_clear_pcib; +TUNABLE_INT("hw.pci.clear_pcib", &pci_clear_pcib); +SYSCTL_INT(_hw_pci, OID_AUTO, clear_pcib, CTLFLAG_RDTUN, &pci_clear_pcib, 0, + "Clear firmware-assigned resources for PCI-PCI bridge I/O windows."); /* * Is a resource from a child device sub-allocated from one of our @@ -416,6 +422,19 @@ pcib_probe_windows(struct pcib_softc *sc dev = sc->dev; + if (pci_clear_pcib) { + pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1); + pci_write_config(dev, PCIR_IOBASEH_1, 0xffff, 2); + pci_write_config(dev, PCIR_IOLIMITL_1, 0, 1); + pci_write_config(dev, PCIR_IOLIMITH_1, 0, 2); + pci_write_config(dev, PCIR_MEMBASE_1, 0xffff, 2); + pci_write_config(dev, PCIR_MEMLIMIT_1, 0, 2); + pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2); + pci_write_config(dev, PCIR_PMBASEH_1, 0xffffffff, 4); + pci_write_config(dev, PCIR_PMLIMITL_1, 0, 2); + pci_write_config(dev, PCIR_PMLIMITH_1, 0, 4); + } + /* Determine if the I/O port window is implemented. */ val = pci_read_config(dev, PCIR_IOBASEL_1, 1); if (val == 0) {