Skip site navigation (1)Skip section navigation (2)
Date:      Wed, 24 Aug 2011 13:35:56 +0000 (UTC)
From:      Grzegorz Bernacki <gber@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-projects@freebsd.org
Subject:   svn commit: r225143 - in projects/armv6/sys: arm/arm conf
Message-ID:  <201108241335.p7ODZu5e056862@svn.freebsd.org>

next in thread | raw e-mail | index | archive | help
Author: gber
Date: Wed Aug 24 13:35:56 2011
New Revision: 225143
URL: http://svn.freebsd.org/changeset/base/225143

Log:
  Few small fixes and whitespace removal.
  
  Submitted by: Damjan Marion

Modified:
  projects/armv6/sys/arm/arm/cpufunc_asm_armv7.S
  projects/armv6/sys/arm/arm/pmap-v6.c
  projects/armv6/sys/conf/options.arm

Modified: projects/armv6/sys/arm/arm/cpufunc_asm_armv7.S
==============================================================================
--- projects/armv6/sys/arm/arm/cpufunc_asm_armv7.S	Wed Aug 24 12:18:29 2011	(r225142)
+++ projects/armv6/sys/arm/arm/cpufunc_asm_armv7.S	Wed Aug 24 13:35:56 2011	(r225143)
@@ -62,7 +62,7 @@ ENTRY(armv7_tlb_flushID)
 
 ENTRY(armv7_tlb_flushID_SE)
 	ldr	r1, .Lpage_mask
-	bic	r0, r0, r1	
+	bic	r0, r0, r1
 	mcr	p15, 0, r0, c8, c7, 1	/* flush D tlb single entry */
 	mcr	p15, 0, r0, c7, c5, 6	/* flush BTB */
 	mcr	p15, 0, r0, c7, c10, 4	/* DSB */
@@ -83,7 +83,7 @@ Loop1:
 	/* Get cache type for given level */
 	mov	r2, r8, lsl #2
 	ldr	r0, .Lcache_type
-	ldr	r1, [r0, r2]	
+	ldr	r1, [r0, r2]
 
 	/* Get line size */
 	and	r2, r1, #7
@@ -93,7 +93,7 @@ Loop1:
 	ldr	r4, .Lway_mask
 	ands	r4, r4, r1, lsr #3
 	clz	r5, r4
-	
+
 	/* Get max index */
 	ldr	r7, .Lmax_index
 	ands	r7, r7, r1, lsr #13
@@ -145,7 +145,6 @@ ENTRY(armv7_dcache_wb_range)
 	mcr	p15, 0, r0, c7, c10, 4	/* drain the write buffer */
 	bx	lr
 
-	
 ENTRY(armv7_dcache_wbinv_range)
 	ldr	ip, .Larmv7_line_size
 .Larmv7_wbinv_next:
@@ -155,7 +154,7 @@ ENTRY(armv7_dcache_wbinv_range)
 	bhi	.Larmv7_wbinv_next
 	mcr	p15, 0, r0, c7, c10, 4	/* drain the write buffer */
 	bx	lr
-	
+
 /*
  * Note, we must not invalidate everything.  If the range is too big we
  * must use wb-inv of the entire cache.

Modified: projects/armv6/sys/arm/arm/pmap-v6.c
==============================================================================
--- projects/armv6/sys/arm/arm/pmap-v6.c	Wed Aug 24 12:18:29 2011	(r225142)
+++ projects/armv6/sys/arm/arm/pmap-v6.c	Wed Aug 24 13:35:56 2011	(r225143)
@@ -3614,7 +3614,7 @@ pmap_map_chunk(vm_offset_t l1pt, vm_offs
 
 #ifdef VERBOSE_INIT_ARM
 	printf("pmap_map_chunk: pa=0x%x va=0x%x size=0x%x resid=0x%x "
-	    "prot=0x%x cache=%d\n", pa, va, size, resid, prot, cache);
+	    "prot=0x%x type=%d\n", pa, va, size, resid, prot, type);
 #endif
 
 	f1 = l1_mem_types[type];

Modified: projects/armv6/sys/conf/options.arm
==============================================================================
--- projects/armv6/sys/conf/options.arm	Wed Aug 24 12:18:29 2011	(r225142)
+++ projects/armv6/sys/conf/options.arm	Wed Aug 24 13:35:56 2011	(r225143)
@@ -41,5 +41,3 @@ AT91_TSC		opt_at91.h
 AT91_KWIKBYTE		opt_at91.h
 AT91_MCI_HAS_4WIRE	opt_at91.h
 AT91_MCI_SLOT_B		opt_at91.h
-CPU_FA526		opt_global.h
-CPU_FA626TE		opt_global.h



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201108241335.p7ODZu5e056862>