From owner-p4-projects@FreeBSD.ORG Sat Nov 22 17:42:52 2008 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 8B1711065672; Sat, 22 Nov 2008 17:42:52 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 27D04106567D for ; Sat, 22 Nov 2008 17:42:52 +0000 (UTC) (envelope-from nwhitehorn@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 1C36B8FC1F for ; Sat, 22 Nov 2008 17:42:52 +0000 (UTC) (envelope-from nwhitehorn@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.3/8.14.3) with ESMTP id mAMHgq3C069262 for ; Sat, 22 Nov 2008 17:42:52 GMT (envelope-from nwhitehorn@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.3/8.14.3/Submit) id mAMHgpX2069260 for perforce@freebsd.org; Sat, 22 Nov 2008 17:42:51 GMT (envelope-from nwhitehorn@freebsd.org) Date: Sat, 22 Nov 2008 17:42:51 GMT Message-Id: <200811221742.mAMHgpX2069260@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to nwhitehorn@freebsd.org using -f From: Nathan Whitehorn To: Perforce Change Reviews Cc: Subject: PERFORCE change 153361 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 22 Nov 2008 17:42:52 -0000 http://perforce.freebsd.org/chv.cgi?CH=153361 Change 153361 by nwhitehorn@nwhitehorn_trantor on 2008/11/22 17:41:53 Initial SMP support for 64-bit PowerPC CPUs. This does not work yet, due to the following problems: 1. G5s don't have L2CR and L3CR, so trying to set them as the current SMP code does causes illegal instruction traps. 2. Mambo-specific: it looks like Mambo may require using magic instructions to start secondary CPUs. However, they can still be started by hand. Affected files ... .. //depot/projects/ppc-g5/sys/powerpc/aim/mmu_oea.c#5 edit .. //depot/projects/ppc-g5/sys/powerpc/aim/mmu_oea64.c#10 edit .. //depot/projects/ppc-g5/sys/powerpc/powerpc/mmu_if.m#2 edit .. //depot/projects/ppc-g5/sys/powerpc/powerpc/pmap_dispatch.c#3 edit Differences ... ==== //depot/projects/ppc-g5/sys/powerpc/aim/mmu_oea.c#5 (text+ko) ==== @@ -323,6 +323,7 @@ void moea_zero_page_idle(mmu_t, vm_page_t); void moea_activate(mmu_t, struct thread *); void moea_deactivate(mmu_t, struct thread *); +void moea_cpu_bootstrap(mmu_t, int); void moea_bootstrap(mmu_t, vm_offset_t, vm_offset_t); void *moea_mapdev(mmu_t, vm_offset_t, vm_size_t); void moea_unmapdev(mmu_t, vm_offset_t, vm_size_t); @@ -364,6 +365,7 @@ /* Internal interfaces */ MMUMETHOD(mmu_bootstrap, moea_bootstrap), + MMUMETHOD(mmu_cpu_bootstrap, moea_cpu_bootstrap), MMUMETHOD(mmu_mapdev, moea_mapdev), MMUMETHOD(mmu_unmapdev, moea_unmapdev), MMUMETHOD(mmu_kextract, moea_kextract), @@ -617,7 +619,7 @@ } void -pmap_cpu_bootstrap(int ap) +moea_cpu_bootstrap(mmu_t mmup, int ap) { u_int sdr; int i; @@ -898,7 +900,7 @@ kernel_pmap->pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT; kernel_pmap->pm_active = ~0; - pmap_cpu_bootstrap(0); + moea_cpu_bootstrap(mmup,0); pmap_bootstrapped++; ==== //depot/projects/ppc-g5/sys/powerpc/aim/mmu_oea64.c#10 (text+ko) ==== @@ -366,6 +366,7 @@ */ static void moea64_bridge_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend); +static void moea64_bridge_cpu_bootstrap(mmu_t, int ap); static void moea64_enter_locked(pmap_t, vm_offset_t, vm_page_t, vm_prot_t, boolean_t); static void moea64_bootstrap_find_framebuffer(vm_offset_t *va, @@ -450,6 +451,7 @@ /* Internal interfaces */ MMUMETHOD(mmu_bootstrap, moea64_bridge_bootstrap), + MMUMETHOD(mmu_cpu_bootstrap, moea64_bridge_cpu_bootstrap), MMUMETHOD(mmu_mapdev, moea64_mapdev), MMUMETHOD(mmu_unmapdev, moea64_unmapdev), MMUMETHOD(mmu_kextract, moea64_kextract), @@ -700,7 +702,7 @@ } static void -moea64_bridge_cpu_bootstrap(int ap) +moea64_bridge_cpu_bootstrap(mmu_t mmup, int ap) { int i = 0; @@ -979,7 +981,7 @@ /* * Initialize MMU and remap early physical mappings */ - moea64_bridge_cpu_bootstrap(0); + moea64_bridge_cpu_bootstrap(mmup,0); mtmsr(mfmsr() | PSL_DR | PSL_IR); isync(); pmap_bootstrapped++; bs_remap_earlyboot(); ==== //depot/projects/ppc-g5/sys/powerpc/powerpc/mmu_if.m#2 (text+ko) ==== @@ -697,6 +697,18 @@ vm_offset_t _end; }; +/** + * @brief Set up the MMU on the current CPU. Only called by the PMAP layer + * for alternate CPUs on SMP systems. + * + * @param _ap Set to 1 if the CPU being set up is an AP + * + */ +METHOD void cpu_bootstrap { + mmu_t _mmu; + int _ap; +}; + /** * @brief Create a kernel mapping for a given physical address range. ==== //depot/projects/ppc-g5/sys/powerpc/powerpc/pmap_dispatch.c#3 (text+ko) ==== @@ -53,6 +53,7 @@ #include #include +#include #include "mmu_if.h" @@ -407,6 +408,13 @@ MMU_BOOTSTRAP(mmu_obj, start, end); } +void +pmap_cpu_bootstrap(int ap) +{ + CTR3(KTR_PMAP, "%s(%#x, %#x)", __func__, pa, size); + return (MMU_CPU_BOOTSTRAP(mmu_obj, ap)); +} + void * pmap_mapdev(vm_offset_t pa, vm_size_t size) {