From owner-freebsd-hackers Sun Mar 19 00:20:16 1995 Return-Path: hackers-owner Received: (from majordom@localhost) by freefall.cdrom.com (8.6.10/8.6.6) id AAA02333 for hackers-outgoing; Sun, 19 Mar 1995 00:20:16 -0800 Received: from gndrsh.aac.dev.com (gndrsh.aac.dev.com [198.145.92.241]) by freefall.cdrom.com (8.6.10/8.6.6) with ESMTP id AAA02327; Sun, 19 Mar 1995 00:20:11 -0800 Received: (from rgrimes@localhost) by gndrsh.aac.dev.com (8.6.8/8.6.6) id AAA22929; Sun, 19 Mar 1995 00:19:40 -0800 From: "Rodney W. Grimes" Message-Id: <199503190819.AAA22929@gndrsh.aac.dev.com> Subject: Re: NMI Error success story To: phk@ref.tfs.com (Poul-Henning Kamp) Date: Sun, 19 Mar 1995 00:19:40 -0800 (PST) Cc: nate@sneezy.sri.com, hackers@FreeBSD.org, core@FreeBSD.org In-Reply-To: <199503190806.AAA22675@ref.tfs.com> from "Poul-Henning Kamp" at Mar 19, 95 00:06:58 am X-Mailer: ELM [version 2.4 PL23] Content-Type: text Content-Length: 746 Sender: hackers-owner@FreeBSD.org Precedence: bulk > > > Humm.. 3+1+1+1 = 6, 3+2+2+2=9, should have been 30% faster if everything > > hit the cache, figure an actual cache hit rate of 80% and you should have > > seen a 24% performance increase by this. > > Well, 10% is what I saw on "make world"... We must be missing the cache a lot more than I figured on. Time for me to go stick some Pentium counter code in, wish that I had some way to easily watch the external cache hit rate... let me see, I need 2 >60Mhz counters, and the data books on the SIS 82C50X or Opti 597 chip sets. Wonder how many digits I need for make world :-) :-) -- Rod Grimes rgrimes@gndrsh.aac.dev.com Accurate Automation Company Custom computers for FreeBSD