From owner-svn-src-head@freebsd.org Sat Oct 17 17:31:07 2020 Return-Path: Delivered-To: svn-src-head@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 53F2F43D317; Sat, 17 Oct 2020 17:31:07 +0000 (UTC) (envelope-from mhorne@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4CD96M1Zr9z4R7l; Sat, 17 Oct 2020 17:31:07 +0000 (UTC) (envelope-from mhorne@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 1B1F3252A7; Sat, 17 Oct 2020 17:31:07 +0000 (UTC) (envelope-from mhorne@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 09HHV6cw087798; Sat, 17 Oct 2020 17:31:06 GMT (envelope-from mhorne@FreeBSD.org) Received: (from mhorne@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 09HHV6iD087797; Sat, 17 Oct 2020 17:31:06 GMT (envelope-from mhorne@FreeBSD.org) Message-Id: <202010171731.09HHV6iD087797@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: mhorne set sender to mhorne@FreeBSD.org using -f From: Mitchell Horne Date: Sat, 17 Oct 2020 17:31:06 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r366794 - head/sys/riscv/riscv X-SVN-Group: head X-SVN-Commit-Author: mhorne X-SVN-Commit-Paths: head/sys/riscv/riscv X-SVN-Commit-Revision: 366794 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.33 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 17 Oct 2020 17:31:07 -0000 Author: mhorne Date: Sat Oct 17 17:31:06 2020 New Revision: 366794 URL: https://svnweb.freebsd.org/changeset/base/366794 Log: riscv: zero reserved PTE bits for L2 PTEs As was done for L3 PTEs in r362853, mask out the reserved bits when extracting the physical address from an L2 PTE. Future versions of the spec or custom implementations may make use of these reserved bits, in which case the resulting physical address could be incorrect. Submitted by: Nathaniel Filardo Reviewed by: kp, mhorne Differential Revision: https://reviews.freebsd.org/D26607 Modified: head/sys/riscv/riscv/pmap.c Modified: head/sys/riscv/riscv/pmap.c ============================================================================== --- head/sys/riscv/riscv/pmap.c Sat Oct 17 13:06:29 2020 (r366793) +++ head/sys/riscv/riscv/pmap.c Sat Oct 17 17:31:06 2020 (r366794) @@ -342,6 +342,8 @@ pagezero(void *p) #define PTE_TO_PHYS(pte) \ ((((pte) & ~PTE_HI_MASK) >> PTE_PPN0_S) * PAGE_SIZE) +#define L2PTE_TO_PHYS(l2) \ + ((((l2) & ~PTE_HI_MASK) >> PTE_PPN1_S) << L2_SHIFT) static __inline pd_entry_t * pmap_l1(pmap_t pmap, vm_offset_t va) @@ -477,7 +479,7 @@ pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va) ("Invalid bootstrap L2 table")); /* L2 is superpages */ - ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT; + ret = L2PTE_TO_PHYS(l2[l2_slot]); ret += (va & L2_OFFSET); return (ret); @@ -825,7 +827,7 @@ pmap_extract(pmap_t pmap, vm_offset_t va) } } else { /* L2 is superpages */ - pa = (l2 >> PTE_PPN1_S) << L2_SHIFT; + pa = L2PTE_TO_PHYS(l2); pa |= (va & L2_OFFSET); } } @@ -877,7 +879,7 @@ pmap_kextract(vm_offset_t va) panic("pmap_kextract: No l2"); if ((pmap_load(l2) & PTE_RX) != 0) { /* superpages */ - pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT; + pa = L2PTE_TO_PHYS(pmap_load(l2)); pa |= (va & L2_OFFSET); return (pa); }