Date: Wed, 26 Jul 2023 07:14:51 -0700 From: Kevin Bowling <kevin.bowling@kev009.com> To: Cheng Cui <cc@freebsd.org> Cc: FreeBSD Net <freebsd-net@freebsd.org> Subject: Re: CFT: lem(4), em(4) e1000 Ethernet TSO testing Message-ID: <CAK7dMtCEcV%2Bc=dr72mnGmO9ZpzHOb9igHJX1zEtZOo5cnZwu7g@mail.gmail.com> In-Reply-To: <CAGaXui%2BAkHmS-m6y0CtRB6-v5k1ikzKigF-oL14mfk6Sbt8pkQ@mail.gmail.com> References: <CAK7dMtDrugPGtasdYi=U0gJ3P_6bfGyB5EXf2haY4gmHDuyAWA@mail.gmail.com> <CAGaXui%2BAkHmS-m6y0CtRB6-v5k1ikzKigF-oL14mfk6Sbt8pkQ@mail.gmail.com>
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On Wed, Jul 26, 2023 at 6:43=E2=80=AFAM Cheng Cui <cc@freebsd.org> wrote: Hi Cheng, > I didn't see your post covering 82541 or 82546 chips. Does this new em(4)= change support TSO on these chips? If yes, I would be happy to test it on = them. 82541 would be excluded, while 82546 would be a candidate to enable TSO with my patches (ifconfig em2 tso tso6) > > root@s1:~ # dmesg | grep 8254 > Timecounter "i8254" frequency 1193182 Hz quality 0 > Event timer "i8254" frequency 1193182 Hz quality 100 > em0: <Intel(R) Legacy PRO/1000 MT 82541GI> port 0xdcc0-0xdcff mem 0xdfae0= 000-0xdfafffff irq 64 at device 7.0 on pci6 > em1: <Intel(R) Legacy PRO/1000 MT 82541GI> port 0xccc0-0xccff mem 0xdf8e0= 000-0xdf8fffff irq 65 at device 8.0 on pci7 > em2: <Intel(R) Legacy PRO/1000 MT 82546EB (Copper)> port 0xbcc0-0xbcff me= m 0xdf5e0000-0xdf5fffff irq 106 at device 4.0 on pci9 > em3: <Intel(R) Legacy PRO/1000 MT 82546EB (Copper)> port 0xbc80-0xbcbf me= m 0xdf5c0000-0xdf5dffff irq 107 at device 4.1 on pci9 > em4: <Intel(R) Legacy PRO/1000 MT 82546EB (Copper)> port 0xacc0-0xacff me= m 0xdf3e0000-0xdf3fffff irq 101 at device 3.0 on pci10 > em5: <Intel(R) Legacy PRO/1000 MT 82546EB (Copper)> port 0xac80-0xacbf me= m 0xdf3c0000-0xdf3dffff irq 102 at device 3.1 on pci10 > > Best Regards, > Cheng Cui > > > On Tue, Jul 25, 2023 at 10:38=E2=80=AFPM Kevin Bowling <kevin.bowling@kev= 009.com> wrote: >> >> Hi, >> >> I have been working through various bugs and have come to a point >> where TSO is working on systems I have available for testing. >> >> This results in higher throughput on resource constrained systems, and >> less CPU/power usage on unconstrained systems. >> >> As of this mail, you will need to manually apply >> https://reviews.freebsd.org/D41170 on top of main to use TSO6 on >> em(4). >> >> I plan to enable TSO by default for lem(4) and em(4) during the >> FreeBSD 14 release cycle, so I would appreciate testing to address any >> remaining issues. Below, a list of chipsets that will be exempt due >> to known issues. >> >> lem(4) exclusions: >> * <82544 (although it does seem ok to manually enable for emulations >> in qemu, virtualbox, etc) >> * 82547 >> >> em(4) exclusions.. These chips have a stability workaround for high >> throughput with rapid link-flap applied that results in the TSO engine >> not being able to run at line speed. Thus, TSO would not be enabled >> by default here: >> * Intel(R) I219-LM and I219-V >> * Intel(R) I219-LM and I219-V (2) >> * Intel(R) I219-LM and I219-V (3) >> * Intel(R) I219-LM and I219-V (4) >> * Intel(R) I219-LM and I219-V (5) >> >> Regards, >> Kevin Bowling >>
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