From owner-freebsd-arch@FreeBSD.ORG Mon Dec 11 10:30:38 2006 Return-Path: X-Original-To: freebsd-arch@freebsd.org Delivered-To: freebsd-arch@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 9F1E016A506 for ; Mon, 11 Dec 2006 10:30:38 +0000 (UTC) (envelope-from andre@freebsd.org) Received: from c00l3r.networx.ch (c00l3r.networx.ch [62.48.2.2]) by mx1.FreeBSD.org (Postfix) with ESMTP id 1FF8F43D8C for ; Mon, 11 Dec 2006 10:25:33 +0000 (GMT) (envelope-from andre@freebsd.org) Received: (qmail 43006 invoked from network); 11 Dec 2006 10:14:29 -0000 Received: from c00l3r.networx.ch (HELO [127.0.0.1]) ([62.48.2.2]) (envelope-sender ) by c00l3r.networx.ch (qmail-ldap-1.03) with SMTP for ; 11 Dec 2006 10:14:29 -0000 Message-ID: <457D3265.7070004@freebsd.org> Date: Mon, 11 Dec 2006 11:26:45 +0100 From: Andre Oppermann User-Agent: Thunderbird 1.5.0.8 (Windows/20061025) MIME-Version: 1.0 To: John Polstra References: <200611201242.58088.jhb@freebsd.org> <095D8C4E-5C80-451A-8DF9-C3B307A0F603@polstra.com> In-Reply-To: <095D8C4E-5C80-451A-8DF9-C3B307A0F603@polstra.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: freebsd-arch@freebsd.org Subject: Re: Where do MSI quirks belong? [patch] X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 11 Dec 2006 10:30:38 -0000 John Polstra wrote: > > On Nov 20, 2006, at 9:42 AM, John Baldwin wrote: > >> It's going to be a function of the chipset, as something in the chipset >> (presumably a Host -> PCI bridge) has to listen for writes to >> 0xfeeXXXXXX and >> convert them into APIC messages. There are two ways I planned on >> doing this: >> >> 1) Allow PCI-PCI bridges to be blacklisted, and the pcib_alloc_msi[x]() >> methods would compare the bridge's device id against a blacklist. >> This can >> matter if you have virtual PCI-PCI bridges that really a HT -> PCI >> bridge or >> the like. >> >> 2) Blacklist chipsets in the x86 MD code based on the device ID of the >> first >> Host -> PCI bridge at device 0.0.0. > > I have implemented both of these checks, except that I put #2 into the > MI code since I couldn't find any reason to make it x86-specific. > Here's the patch. Does it look OK to you? It works fine here. IIRC it is not only a chipset problem but also sometimes how a MSI capable chipset is wired on the mainboard. So some probing would have to be done as well. -- Andre