Date: Wed, 1 Mar 2023 14:44:39 GMT From: Andrew Turner <andrew@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: 281402e0a563 - main - arm64: Shave off two instructions in exceptions Message-ID: <202303011444.321Eidmr020241@gitrepo.freebsd.org>
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The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=281402e0a5638108ead2529c63e34f3d1771d05e commit 281402e0a5638108ead2529c63e34f3d1771d05e Author: Dapeng Gao <dg612@cam.ac.uk> AuthorDate: 2023-03-01 14:28:53 +0000 Commit: Andrew Turner <andrew@FreeBSD.org> CommitDate: 2023-03-01 14:43:43 +0000 arm64: Shave off two instructions in exceptions This patch shaves off up to two three instructions in save_registers_head in exception.S for arm64, which would make more space for instructions that could be added in CheriBSD. This is done by: 1. Combining pointer arithmetic with pre-incrementing STP instructions 2. Removing the instruction that sets the frame pointer (x29) as its content is unused Differential Revision: https://reviews.freebsd.org/D34631 --- sys/arm64/arm64/exception.S | 43 +++++++++++++++++++++---------------------- 1 file changed, 21 insertions(+), 22 deletions(-) diff --git a/sys/arm64/arm64/exception.S b/sys/arm64/arm64/exception.S index 55bac5e5228a..fd55e1f39b58 100644 --- a/sys/arm64/arm64/exception.S +++ b/sys/arm64/arm64/exception.S @@ -41,35 +41,34 @@ __FBSDID("$FreeBSD$"); .macro save_registers_head el .if \el == 1 mov x18, sp - sub sp, sp, #128 + stp x0, x1, [sp, #(TF_X - TF_SIZE - 128)]! +.else + stp x0, x1, [sp, #(TF_X - TF_SIZE)]! .endif - sub sp, sp, #(TF_SIZE) - stp x28, x29, [sp, #(TF_X + 28 * 8)] - stp x26, x27, [sp, #(TF_X + 26 * 8)] - stp x24, x25, [sp, #(TF_X + 24 * 8)] - stp x22, x23, [sp, #(TF_X + 22 * 8)] - stp x20, x21, [sp, #(TF_X + 20 * 8)] - stp x18, x19, [sp, #(TF_X + 18 * 8)] - stp x16, x17, [sp, #(TF_X + 16 * 8)] - stp x14, x15, [sp, #(TF_X + 14 * 8)] - stp x12, x13, [sp, #(TF_X + 12 * 8)] - stp x10, x11, [sp, #(TF_X + 10 * 8)] - stp x8, x9, [sp, #(TF_X + 8 * 8)] - stp x6, x7, [sp, #(TF_X + 6 * 8)] - stp x4, x5, [sp, #(TF_X + 4 * 8)] - stp x2, x3, [sp, #(TF_X + 2 * 8)] - stp x0, x1, [sp, #(TF_X + 0 * 8)] - mrs x10, elr_el1 - mrs x11, spsr_el1 - mrs x12, esr_el1 + stp x2, x3, [sp, #(2 * 8)] + stp x4, x5, [sp, #(4 * 8)] + stp x6, x7, [sp, #(6 * 8)] + stp x8, x9, [sp, #(8 * 8)] + stp x10, x11, [sp, #(10 * 8)] + stp x12, x13, [sp, #(12 * 8)] + stp x14, x15, [sp, #(14 * 8)] + stp x16, x17, [sp, #(16 * 8)] + stp x18, x19, [sp, #(18 * 8)] + stp x20, x21, [sp, #(20 * 8)] + stp x22, x23, [sp, #(22 * 8)] + stp x24, x25, [sp, #(24 * 8)] + stp x26, x27, [sp, #(26 * 8)] + stp x28, x29, [sp, #(28 * 8)] .if \el == 0 mrs x18, sp_el0 .endif + mrs x10, elr_el1 + mrs x11, spsr_el1 + mrs x12, esr_el1 + stp x18, lr, [sp, #(TF_SP - TF_X)]! str x10, [sp, #(TF_ELR)] stp w11, w12, [sp, #(TF_SPSR)] - stp x18, lr, [sp, #(TF_SP)] mrs x18, tpidr_el1 - add x29, sp, #(TF_SIZE) .endm .macro save_registers el
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