From nobody Tue May 2 14:08:49 2023 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4Q9hl624Lhz491Yn; Tue, 2 May 2023 14:08:50 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4Q9hl61Rzsz45dF; Tue, 2 May 2023 14:08:50 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1683036530; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=bHZNvtfXcEhmeSUEqEv0lRUOG/4DO57k50g0Q+3XNwI=; b=ZCHJm0xmvJXQLDUO417siao0bZNaeq359e/xgXQ7psLHxBT2B1zWNnkaS0JPBwBExgdFHf GK4R3oXFsfMHuUyxzmP7PGZOoqKRikQjstpR/SWVWCp1av2rVofib0b6UX0IRu0YdyoUTf 6fSaa3X1mpTLFuA4VqwwPRyYkX+q+k1uzPU+yi0PbmYJg7MtuSzL/ca/dZQgRaBbsVCFpF SKcLWPJxuqZXC3h5t4VTCr4nyLgxXZn7Of/z541VrlYSr1J2CXPKDnahl3cQZITZaSorrY W7rz1oo4k7s84sWTTffTOpkVDYBihc+78l1aifLzp3yULJ7yw6/sn8Q5pQUNHA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1683036530; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=bHZNvtfXcEhmeSUEqEv0lRUOG/4DO57k50g0Q+3XNwI=; b=NPdCM9eJlagiIty/5CMWanGHzSAuJHTlOyw3TOF5RJEboCC9fMIouvfjECo2R8FVDPyb0U uPd+b9dPek/PDsoWKtrYoeTzqU3DCYLSrtMsf9hE+755ZhTAs9QCehCpLnyoPuLax7L5Ag Thx3tui3fHgEmwvemqBqFMGcJk0DWWMGmI25JRGhfvlK+2lNyjNDARbryznFXyhYqk2uwa ok96Z8gHSwbuTSQ4aadkHTc0pIsOU0KPetxl2YjKszMReUdIilbc3HezmXM8Zdlk2/jeBZ Jio3SscEiyIX4llG2z6QhYsS7F9ETG1UoGWFD+zBnD0hVdMIUAGiH4Yt4kUWZQ== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1683036530; a=rsa-sha256; cv=none; b=eKxi5eg7nWouMduJE6lFHMANiL4wGeYV56JU3XUfL9cTFVSFk9UGlSYBxqTKpU2swiKtsj HMESyrBptl5ze/c0WiRcab8HY/qm5b15f9LkFtRCWO6J1acuP6MPy4Ue3z/9dUvFF8ZGAm oTXnRb7eOISYXVbAj9faUupV81D5Ipe9fLadW/BpkSLYVHJF/QxYnYYVDNj60tX/jRJ5Ik 0idgtpvQTcts0kUnCicw4XznV0QIqocv3pFmUCe4HoNegwdAlv5ooVGfab+BDjYNJR2lB/ oSblRnVn2rKgqvnETYDCyBujIAxiSpCN2YAlBUvUQDTzFDsLtuaOPs6PYvMYhQ== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4Q9hl60Pm4zr0B; Tue, 2 May 2023 14:08:50 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.16.1/8.16.1) with ESMTP id 342E8nw8041015; Tue, 2 May 2023 14:08:49 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.16.1/8.16.1/Submit) id 342E8nRS041014; Tue, 2 May 2023 14:08:49 GMT (envelope-from git) Date: Tue, 2 May 2023 14:08:49 GMT Message-Id: <202305021408.342E8nRS041014@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: "Jason A. Harmening" Subject: git: 6f378116e9bf - main - Intel DMAR: remove parsing of 6-level paging capability List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-all@freebsd.org X-BeenThere: dev-commits-src-all@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: jah X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 6f378116e9bf982b8246d033d81cb64d52b24462 Auto-Submitted: auto-generated X-ThisMailContainsUnwantedMimeParts: N The branch main has been updated by jah: URL: https://cgit.FreeBSD.org/src/commit/?id=6f378116e9bf982b8246d033d81cb64d52b24462 commit 6f378116e9bf982b8246d033d81cb64d52b24462 Author: Jason A. Harmening AuthorDate: 2023-05-01 16:22:39 +0000 Commit: Jason A. Harmening CommitDate: 2023-05-02 14:06:11 +0000 Intel DMAR: remove parsing of 6-level paging capability Early versions of the VT-d spec mentioned 6-level paging support as a possible value for the SAGAW capability, but later versions removed it and SAGAW=0x10 is currently listed as a reserved value. The 6-level (agaw=64) entry in sagaw_bits is furthermore problematic with clang15 because the attempted comparison against 1ULL << 64 in dmar_maxaddr2mgaw() causes the compiler to elide the last iteration of the initial loop, which bypasses the subsequent logic to find the greatest HW-supported address width. This results in 5-level paging always being selected regardless of whether the hardware supports it, which can result address translation failure due to invalid context- entry programming. Reviewed by: kib MFC after: 3 days Differential Revision: https://reviews.freebsd.org/D39896 --- sys/x86/iommu/intel_utils.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/sys/x86/iommu/intel_utils.c b/sys/x86/iommu/intel_utils.c index e3ebea648c4c..f2cf58ca04fa 100644 --- a/sys/x86/iommu/intel_utils.c +++ b/sys/x86/iommu/intel_utils.c @@ -99,9 +99,14 @@ static const struct sagaw_bits_tag { {.agaw = 48, .cap = DMAR_CAP_SAGAW_4LVL, .awlvl = DMAR_CTX2_AW_4LVL, .pglvl = 4}, {.agaw = 57, .cap = DMAR_CAP_SAGAW_5LVL, .awlvl = DMAR_CTX2_AW_5LVL, - .pglvl = 5}, - {.agaw = 64, .cap = DMAR_CAP_SAGAW_6LVL, .awlvl = DMAR_CTX2_AW_6LVL, - .pglvl = 6} + .pglvl = 5} + /* + * 6-level paging (DMAR_CAP_SAGAW_6LVL) is not supported on any + * current VT-d hardware and its SAGAW field value is listed as + * reserved in the VT-d spec. If support is added in the future, + * this structure and the logic in dmar_maxaddr2mgaw() will need + * to change to avoid attempted comparison against 1ULL << 64. + */ }; bool